linux/arch/arm64/mm
Ard Biesheuvel 3fc24ef32d arm64: compat: Implement misalignment fixups for multiword loads
The 32-bit ARM kernel implements fixups on behalf of user space when
using LDM/STM or LDRD/STRD instructions on addresses that are not 32-bit
aligned. This is not something that is supported by the architecture,
but was done anyway to increase compatibility with user space software,
which mostly targeted x86 at the time and did not care about aligned
accesses.

This feature is one of the remaining impediments to being able to switch
to 64-bit kernels on 64-bit capable hardware running 32-bit user space,
so let's implement it for the arm64 compat layer as well.

Note that the intent is to implement the exact same handling of
misaligned multi-word loads and stores as the 32-bit kernel does,
including what appears to be missing support for user space programs
that rely on SETEND to switch to a different byte order and back. Also,
like the 32-bit ARM version, we rely on the faulting address reported by
the CPU to infer the memory address, instead of decoding the instruction
fully to obtain this information.

This implementation is taken from the 32-bit ARM tree, with all pieces
removed that deal with instructions other than LDRD/STRD and LDM/STM, or
that deal with alignment exceptions taken in kernel mode.

Cc: debian-arm@lists.debian.org
Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Riku Voipio <riku.voipio@iki.fi>
Cc: Steve McIntyre <steve@einval.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20220701135322.3025321-1-ardb@kernel.org
[catalin.marinas@arm.com: change the option to 'default n']
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2022-09-06 09:34:53 +01:00
..
cache.S arm64: mm: Remove assembly DMA cache maintenance wrappers 2022-07-05 13:06:31 +01:00
context.c arm64: mm: Use asid feature macro for cheanup 2021-12-10 18:24:20 +00:00
copypage.c arm64: kasan: Revert "arm64: mte: reset the page tag in page->flags" 2022-07-07 10:48:37 +01:00
dma-mapping.c arm64: mm: Remove assembly DMA cache maintenance wrappers 2022-07-05 13:06:31 +01:00
extable.c arm64: extable: cleanup redundant extable type EX_TYPE_FIXUP 2022-06-28 12:11:47 +01:00
fault.c arm64: compat: Implement misalignment fixups for multiword loads 2022-09-06 09:34:53 +01:00
flush.c mm: hugetlb_vmemmap: delete hugetlb_optimize_vmemmap_enabled() 2022-08-08 18:06:42 -07:00
hugetlbpage.c - The usual batches of cleanups from Baoquan He, Muchun Song, Miaohe 2022-08-05 16:32:45 -07:00
init.c EFI updates for v5.20 2022-08-03 14:38:02 -07:00
ioremap.c arm64: mm: Convert to GENERIC_IOREMAP 2022-06-27 12:22:31 +01:00
kasan_init.c arm64: mm: provide idmap pointer to cpu_replace_ttbr1() 2022-06-24 17:18:10 +01:00
Makefile arm64: trans_pgd: hibernate: Add trans_pgd_copy_el2_vectors 2021-10-01 13:30:59 +01:00
mmap.c arm64/mm: move protection_map[] inside the platform 2022-07-17 17:14:37 -07:00
mmu.c arm64: fix rodata=full 2022-08-23 11:02:02 +01:00
mteswap.c arm64: kasan: Revert "arm64: mte: reset the page tag in page->flags" 2022-07-07 10:48:37 +01:00
pageattr.c kasan, arm64: don't tag executable vmalloc allocations 2022-03-24 19:06:48 -07:00
pgd.c mm: consolidate pgtable_cache_init() and pgd_cache_init() 2019-09-24 15:54:09 -07:00
physaddr.c arm64: Do not pass tagged addresses to __is_lm_address() 2021-02-02 17:44:47 +00:00
proc.S Merge branch 'for-next/boot' into for-next/core 2022-07-25 10:59:15 +01:00
ptdump_debugfs.c arm64: Add __init section marker to some functions 2021-04-08 17:45:10 +01:00
ptdump.c arm64/bpf: Remove 128MB limit for BPF JIT programs 2021-11-08 22:16:26 +01:00
trans_pgd-asm.S arm64: kexec: configure EL2 vectors for kexec 2021-10-01 13:31:00 +01:00
trans_pgd.c arm64: mm: avoid writable executable mappings in kexec/hibernate code 2022-05-17 09:32:45 +01:00