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e446eba153
DTSes with new i.MX 8M SoCs introduce their own compatibles so add them
to fix dtbs_check warnings like:
arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: reset-controller@30390000:
compatible:0: 'fsl,imx8mm-src' is not one of ['fsl,imx7d-src', 'fsl,imx8mq-src', 'fsl,imx8mp-src']
From schema: Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml
arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: reset-controller@30390000:
compatible:1: 'syscon' was expected
arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: reset-controller@30390000:
compatible: ['fsl,imx8mm-src', 'fsl,imx8mq-src', 'syscon'] is too long
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
66 lines
1.5 KiB
YAML
66 lines
1.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale i.MX7 System Reset Controller
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maintainers:
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- Andrey Smirnov <andrew.smirnov@gmail.com>
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description: |
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The system reset controller can be used to reset various set of
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peripherals. Device nodes that need access to reset lines should
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specify them as a reset phandle in their corresponding node as
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specified in reset.txt.
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For list of all valid reset indices see
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<dt-bindings/reset/imx7-reset.h> for i.MX7,
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<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
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<dt-bindings/reset/imx8mp-reset.h> for i.MX8MP.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- fsl,imx7d-src
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- fsl,imx8mq-src
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- fsl,imx8mp-src
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- const: syscon
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- items:
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- enum:
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- fsl,imx8mm-src
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- fsl,imx8mn-src
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- const: fsl,imx8mq-src
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- const: syscon
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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reset-controller@30390000 {
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compatible = "fsl,imx7d-src", "syscon";
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reg = <0x30390000 0x2000>;
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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#reset-cells = <1>;
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};
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