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Both ADIN1200 & ADIN1300 support Clause 45 access for some registers. The Extended Management Interface (EMI) registers are accessible via both Clause 45 (at register MDIO_MMD_VEND1) and using Clause 22. The Clause 22 access for MMD regs differs from the standard one defined by 802.3. The ADIN PHYs use registers ExtRegPtr (0x0010) and ExtRegData (0x0011) to access Clause 45 & EMI registers. The indirect access is done via the following mechanism (for both R/W): 1. Write the address of the register in the ExtRegPtr 2. Read/write the value of the register via reg ExtRegData This mechanism is needed to manage configuration of chip settings and to access EEE registers via Clause 22. Since Clause 45 access will likely never be used, it is not implemented via this hook. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: David S. Miller <davem@davemloft.net>
124 lines
3.3 KiB
C
124 lines
3.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/**
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* Driver for Analog Devices Industrial Ethernet PHYs
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*
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* Copyright 2019 Analog Devices Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/mii.h>
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#include <linux/phy.h>
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#define PHY_ID_ADIN1200 0x0283bc20
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#define PHY_ID_ADIN1300 0x0283bc30
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#define ADIN1300_MII_EXT_REG_PTR 0x0010
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#define ADIN1300_MII_EXT_REG_DATA 0x0011
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#define ADIN1300_INT_MASK_REG 0x0018
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#define ADIN1300_INT_MDIO_SYNC_EN BIT(9)
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#define ADIN1300_INT_ANEG_STAT_CHNG_EN BIT(8)
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#define ADIN1300_INT_ANEG_PAGE_RX_EN BIT(6)
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#define ADIN1300_INT_IDLE_ERR_CNT_EN BIT(5)
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#define ADIN1300_INT_MAC_FIFO_OU_EN BIT(4)
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#define ADIN1300_INT_RX_STAT_CHNG_EN BIT(3)
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#define ADIN1300_INT_LINK_STAT_CHNG_EN BIT(2)
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#define ADIN1300_INT_SPEED_CHNG_EN BIT(1)
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#define ADIN1300_INT_HW_IRQ_EN BIT(0)
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#define ADIN1300_INT_MASK_EN \
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(ADIN1300_INT_LINK_STAT_CHNG_EN | ADIN1300_INT_HW_IRQ_EN)
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#define ADIN1300_INT_STATUS_REG 0x0019
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static int adin_config_init(struct phy_device *phydev)
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{
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return genphy_config_init(phydev);
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}
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static int adin_phy_ack_intr(struct phy_device *phydev)
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{
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/* Clear pending interrupts */
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int rc = phy_read(phydev, ADIN1300_INT_STATUS_REG);
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return rc < 0 ? rc : 0;
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}
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static int adin_phy_config_intr(struct phy_device *phydev)
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{
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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return phy_set_bits(phydev, ADIN1300_INT_MASK_REG,
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ADIN1300_INT_MASK_EN);
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return phy_clear_bits(phydev, ADIN1300_INT_MASK_REG,
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ADIN1300_INT_MASK_EN);
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}
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static int adin_read_mmd(struct phy_device *phydev, int devad, u16 regnum)
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{
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struct mii_bus *bus = phydev->mdio.bus;
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int phy_addr = phydev->mdio.addr;
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int err;
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err = __mdiobus_write(bus, phy_addr, ADIN1300_MII_EXT_REG_PTR, regnum);
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if (err)
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return err;
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return __mdiobus_read(bus, phy_addr, ADIN1300_MII_EXT_REG_DATA);
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}
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static int adin_write_mmd(struct phy_device *phydev, int devad, u16 regnum,
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u16 val)
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{
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struct mii_bus *bus = phydev->mdio.bus;
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int phy_addr = phydev->mdio.addr;
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int err;
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err = __mdiobus_write(bus, phy_addr, ADIN1300_MII_EXT_REG_PTR, regnum);
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if (err)
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return err;
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return __mdiobus_write(bus, phy_addr, ADIN1300_MII_EXT_REG_DATA, val);
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}
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static struct phy_driver adin_driver[] = {
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{
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PHY_ID_MATCH_MODEL(PHY_ID_ADIN1200),
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.name = "ADIN1200",
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.config_init = adin_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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.ack_interrupt = adin_phy_ack_intr,
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.config_intr = adin_phy_config_intr,
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.resume = genphy_resume,
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.suspend = genphy_suspend,
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.read_mmd = adin_read_mmd,
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.write_mmd = adin_write_mmd,
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},
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{
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PHY_ID_MATCH_MODEL(PHY_ID_ADIN1300),
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.name = "ADIN1300",
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.config_init = adin_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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.ack_interrupt = adin_phy_ack_intr,
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.config_intr = adin_phy_config_intr,
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.resume = genphy_resume,
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.suspend = genphy_suspend,
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.read_mmd = adin_read_mmd,
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.write_mmd = adin_write_mmd,
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},
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};
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module_phy_driver(adin_driver);
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static struct mdio_device_id __maybe_unused adin_tbl[] = {
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{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1200) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_ADIN1300) },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, adin_tbl);
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MODULE_DESCRIPTION("Analog Devices Industrial Ethernet PHY driver");
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MODULE_LICENSE("GPL");
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