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f5fbf84830
Merrifield2 is actually Moorefield. Rename it accordingly and drop tail digit from Merrifield1. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/20160906184254.94440-1-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
193 lines
5.2 KiB
C
193 lines
5.2 KiB
C
/*
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* Intel SOC Punit device state debug driver
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* Punit controls power management for North Complex devices (Graphics
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* blocks, Image Signal Processing, video processing, display, DSP etc.)
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*
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* Copyright (c) 2015, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/io.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/iosf_mbi.h>
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/* Subsystem config/status Video processor */
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#define VED_SS_PM0 0x32
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/* Subsystem config/status ISP (Image Signal Processor) */
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#define ISP_SS_PM0 0x39
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/* Subsystem config/status Input/output controller */
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#define MIO_SS_PM 0x3B
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/* Shift bits for getting status for video, isp and i/o */
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#define SSS_SHIFT 24
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/* Power gate status reg */
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#define PWRGT_STATUS 0x61
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/* Shift bits for getting status for graphics rendering */
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#define RENDER_POS 0
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/* Shift bits for getting status for media control */
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#define MEDIA_POS 2
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/* Shift bits for getting status for Valley View/Baytrail display */
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#define VLV_DISPLAY_POS 6
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/* Subsystem config/status display for Cherry Trail SOC */
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#define CHT_DSP_SSS 0x36
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/* Shift bits for getting status for display */
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#define CHT_DSP_SSS_POS 16
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struct punit_device {
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char *name;
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int reg;
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int sss_pos;
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};
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static const struct punit_device punit_device_tng[] = {
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{ "DISPLAY", CHT_DSP_SSS, SSS_SHIFT },
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{ "VED", VED_SS_PM0, SSS_SHIFT },
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{ "ISP", ISP_SS_PM0, SSS_SHIFT },
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{ "MIO", MIO_SS_PM, SSS_SHIFT },
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{ NULL }
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};
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static const struct punit_device punit_device_byt[] = {
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{ "GFX RENDER", PWRGT_STATUS, RENDER_POS },
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{ "GFX MEDIA", PWRGT_STATUS, MEDIA_POS },
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{ "DISPLAY", PWRGT_STATUS, VLV_DISPLAY_POS },
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{ "VED", VED_SS_PM0, SSS_SHIFT },
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{ "ISP", ISP_SS_PM0, SSS_SHIFT },
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{ "MIO", MIO_SS_PM, SSS_SHIFT },
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{ NULL }
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};
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static const struct punit_device punit_device_cht[] = {
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{ "GFX RENDER", PWRGT_STATUS, RENDER_POS },
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{ "GFX MEDIA", PWRGT_STATUS, MEDIA_POS },
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{ "DISPLAY", CHT_DSP_SSS, CHT_DSP_SSS_POS },
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{ "VED", VED_SS_PM0, SSS_SHIFT },
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{ "ISP", ISP_SS_PM0, SSS_SHIFT },
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{ "MIO", MIO_SS_PM, SSS_SHIFT },
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{ NULL }
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};
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static const char * const dstates[] = {"D0", "D0i1", "D0i2", "D0i3"};
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static int punit_dev_state_show(struct seq_file *seq_file, void *unused)
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{
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u32 punit_pwr_status;
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struct punit_device *punit_devp = seq_file->private;
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int index;
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int status;
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seq_puts(seq_file, "\n\nPUNIT NORTH COMPLEX DEVICES :\n");
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while (punit_devp->name) {
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status = iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ,
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punit_devp->reg, &punit_pwr_status);
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if (status) {
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seq_printf(seq_file, "%9s : Read Failed\n",
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punit_devp->name);
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} else {
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index = (punit_pwr_status >> punit_devp->sss_pos) & 3;
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seq_printf(seq_file, "%9s : %s\n", punit_devp->name,
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dstates[index]);
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}
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punit_devp++;
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}
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return 0;
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}
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static int punit_dev_state_open(struct inode *inode, struct file *file)
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{
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return single_open(file, punit_dev_state_show, inode->i_private);
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}
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static const struct file_operations punit_dev_state_ops = {
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.open = punit_dev_state_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static struct dentry *punit_dbg_file;
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static int punit_dbgfs_register(struct punit_device *punit_device)
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{
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static struct dentry *dev_state;
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punit_dbg_file = debugfs_create_dir("punit_atom", NULL);
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if (!punit_dbg_file)
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return -ENXIO;
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dev_state = debugfs_create_file("dev_power_state", S_IFREG | S_IRUGO,
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punit_dbg_file, punit_device,
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&punit_dev_state_ops);
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if (!dev_state) {
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pr_err("punit_dev_state register failed\n");
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debugfs_remove(punit_dbg_file);
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return -ENXIO;
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}
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return 0;
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}
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static void punit_dbgfs_unregister(void)
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{
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debugfs_remove_recursive(punit_dbg_file);
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}
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#define ICPU(model, drv_data) \
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{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT,\
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(kernel_ulong_t)&drv_data }
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static const struct x86_cpu_id intel_punit_cpu_ids[] = {
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ICPU(INTEL_FAM6_ATOM_SILVERMONT1, punit_device_byt),
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ICPU(INTEL_FAM6_ATOM_MERRIFIELD, punit_device_tng),
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ICPU(INTEL_FAM6_ATOM_AIRMONT, punit_device_cht),
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{}
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};
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MODULE_DEVICE_TABLE(x86cpu, intel_punit_cpu_ids);
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static int __init punit_atom_debug_init(void)
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{
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const struct x86_cpu_id *id;
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int ret;
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id = x86_match_cpu(intel_punit_cpu_ids);
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if (!id)
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return -ENODEV;
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ret = punit_dbgfs_register((struct punit_device *)id->driver_data);
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if (ret < 0)
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return ret;
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return 0;
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}
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static void __exit punit_atom_debug_exit(void)
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{
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punit_dbgfs_unregister();
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}
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module_init(punit_atom_debug_init);
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module_exit(punit_atom_debug_exit);
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MODULE_AUTHOR("Kumar P, Mahesh <mahesh.kumar.p@intel.com>");
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MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
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MODULE_DESCRIPTION("Driver for Punit devices states debugging");
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MODULE_LICENSE("GPL v2");
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