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f32c4c506f
Digital Video Out connector driver LCD panels. Like HDMI and HDA it create bridge, encoder and connector drm object. Add binding description. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
185 lines
4.0 KiB
C
185 lines
4.0 KiB
C
/*
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* Copyright (C) STMicroelectronics SA 2014
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* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include "sti_awg_utils.h"
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#define AWG_OPCODE_OFFSET 10
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enum opcode {
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SET,
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RPTSET,
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RPLSET,
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SKIP,
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STOP,
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REPEAT,
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REPLAY,
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JUMP,
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HOLD,
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};
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static int awg_generate_instr(enum opcode opcode,
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long int arg,
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long int mux_sel,
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long int data_en,
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struct awg_code_generation_params *fwparams)
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{
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u32 instruction = 0;
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u32 mux = (mux_sel << 8) & 0x1ff;
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u32 data_enable = (data_en << 9) & 0x2ff;
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long int arg_tmp = arg;
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/* skip, repeat and replay arg should not exceed 1023.
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* If user wants to exceed this value, the instruction should be
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* duplicate and arg should be adjust for each duplicated instruction.
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*/
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while (arg_tmp > 0) {
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arg = arg_tmp;
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if (fwparams->instruction_offset >= AWG_MAX_INST) {
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DRM_ERROR("too many number of instructions\n");
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return -EINVAL;
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}
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switch (opcode) {
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case SKIP:
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/* leave 'arg' + 1 pixel elapsing without changing
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* output bus */
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arg--; /* pixel adjustment */
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arg_tmp--;
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if (arg < 0) {
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/* SKIP instruction not needed */
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return 0;
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}
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if (arg == 0) {
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/* SKIP 0 not permitted but we want to skip 1
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* pixel. So we transform SKIP into SET
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* instruction */
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opcode = SET;
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arg = (arg << 24) >> 24;
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arg &= (0x0ff);
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break;
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}
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mux = 0;
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data_enable = 0;
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arg = (arg << 22) >> 22;
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arg &= (0x3ff);
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break;
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case REPEAT:
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case REPLAY:
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if (arg == 0) {
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/* REPEAT or REPLAY instruction not needed */
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return 0;
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}
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mux = 0;
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data_enable = 0;
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arg = (arg << 22) >> 22;
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arg &= (0x3ff);
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break;
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case JUMP:
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mux = 0;
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data_enable = 0;
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arg |= 0x40; /* for jump instruction 7th bit is 1 */
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arg = (arg << 22) >> 22;
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arg &= 0x3ff;
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break;
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case STOP:
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arg = 0;
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break;
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case SET:
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case RPTSET:
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case RPLSET:
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case HOLD:
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arg = (arg << 24) >> 24;
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arg &= (0x0ff);
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break;
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default:
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DRM_ERROR("instruction %d does not exist\n", opcode);
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return -EINVAL;
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}
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arg_tmp = arg_tmp - arg;
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arg = ((arg + mux) + data_enable);
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instruction = ((opcode) << AWG_OPCODE_OFFSET) | arg;
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fwparams->ram_code[fwparams->instruction_offset] =
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instruction & (0x3fff);
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fwparams->instruction_offset++;
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}
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return 0;
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}
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int sti_awg_generate_code_data_enable_mode(
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struct awg_code_generation_params *fwparams,
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struct awg_timing *timing)
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{
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long int val;
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long int data_en;
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int ret = 0;
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if (timing->trailing_lines > 0) {
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/* skip trailing lines */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
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val = timing->trailing_lines - 1;
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data_en = 0;
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ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
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}
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if (timing->trailing_pixels > 0) {
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/* skip trailing pixel */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
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val = timing->trailing_pixels - 1;
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data_en = 0;
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ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams);
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}
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/* set DE signal high */
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val = timing->blanking_level;
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data_en = 1;
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ret |= awg_generate_instr((timing->trailing_pixels > 0) ? SET : RPLSET,
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val, 0, data_en, fwparams);
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if (timing->blanking_pixels > 0) {
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/* skip the number of active pixel */
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val = timing->active_pixels - 1;
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data_en = 1;
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ret |= awg_generate_instr(SKIP, val, 0, data_en, fwparams);
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/* set DE signal low */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(SET, val, 0, data_en, fwparams);
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}
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/* replay the sequence as many active lines defined */
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val = timing->active_lines - 1;
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data_en = 0;
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ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
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if (timing->blanking_lines > 0) {
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/* skip blanking lines */
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val = timing->blanking_level;
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data_en = 0;
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ret |= awg_generate_instr(RPLSET, val, 0, data_en, fwparams);
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val = timing->blanking_lines - 1;
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data_en = 0;
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ret |= awg_generate_instr(REPLAY, val, 0, data_en, fwparams);
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}
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return ret;
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}
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