mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-23 11:04:44 +08:00
bb276262e8
Commit 59b356ffd0 ("mtd: m25p80: restore the status of SPI flash when
exiting") is the latest from a long history of attempts to add reboot
handling to handle stateful addressing modes on SPI flash. Some prior
mostly-related discussions:
http://lists.infradead.org/pipermail/linux-mtd/2013-March/046343.html
[PATCH 1/3] mtd: m25p80: utilize dedicated 4-byte addressing commands
http://lists.infradead.org/pipermail/barebox/2014-September/020682.html
[RFC] MTD m25p80 3-byte addressing and boot problem
http://lists.infradead.org/pipermail/linux-mtd/2015-February/057683.html
[PATCH 2/2] m25p80: if supported put chip to deep power down if not used
Previously, attempts to add reboot-time software reset handling were
rejected, but the latest attempt was not.
Quick summary of the problem:
Some systems (e.g., boot ROM or bootloader) assume that they can read
initial boot code from their SPI flash using 3-byte addressing. If the
flash is left in 4-byte mode after reset, these systems won't boot. The
above patch provided a shutdown/remove hook to attempt to reset the
addressing mode before we reboot. Notably, this patch misses out on
huge classes of unexpected reboots (e.g., crashes, watchdog resets).
Unfortunately, it is essentially impossible to solve this problem 100%:
if your system doesn't know how to reset the SPI flash to power-on
defaults at initialization time, no amount of software can really rescue
you -- there will always be a chance of some unexpected reset that
leaves your flash in an addressing mode that your boot sequence didn't
expect.
While it is not directly harmful to perform hacks like the
aforementioned commit on all 4-byte addressing flash, a
properly-designed system should not need the hack -- and in fact,
providing this hack may mask the fact that a given system is indeed
broken. So this patch attempts to apply this unsound hack more narrowly,
providing a strong suggestion to developers and system designers that
this is truly a hack. With luck, system designers can catch their errors
early on in their development cycle, rather than applying this hack long
term. But apparently enough systems are out in the wild that we still
have to provide this hack.
Document a new device tree property to denote systems that do not have a
proper hardware (or software) reset mechanism, and apply the hack (with
a loud warning) only in this case.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
92 lines
3.2 KiB
Plaintext
92 lines
3.2 KiB
Plaintext
* SPI NOR flash: ST M25Pxx (and similar) serial flash chips
|
|
|
|
Required properties:
|
|
- #address-cells, #size-cells : Must be present if the device has sub-nodes
|
|
representing partitions.
|
|
- compatible : May include a device-specific string consisting of the
|
|
manufacturer and name of the chip. A list of supported chip
|
|
names follows.
|
|
Must also include "jedec,spi-nor" for any SPI NOR flash that can
|
|
be identified by the JEDEC READ ID opcode (0x9F).
|
|
|
|
Supported chip names:
|
|
at25df321a
|
|
at25df641
|
|
at26df081a
|
|
mr25h128
|
|
mr25h256
|
|
mr25h10
|
|
mr25h40
|
|
mx25l4005a
|
|
mx25l1606e
|
|
mx25l6405d
|
|
mx25l12805d
|
|
mx25l25635e
|
|
n25q064
|
|
n25q128a11
|
|
n25q128a13
|
|
n25q512a
|
|
s25fl256s1
|
|
s25fl512s
|
|
s25sl12801
|
|
s25fl008k
|
|
s25fl064k
|
|
sst25vf040b
|
|
m25p40
|
|
m25p80
|
|
m25p16
|
|
m25p32
|
|
m25p64
|
|
m25p128
|
|
w25x80
|
|
w25x32
|
|
w25q32
|
|
w25q64
|
|
w25q32dw
|
|
w25q80bl
|
|
w25q128
|
|
w25q256
|
|
|
|
The following chip names have been used historically to
|
|
designate quirky versions of flash chips that do not support the
|
|
JEDEC READ ID opcode (0x9F):
|
|
m25p05-nonjedec
|
|
m25p10-nonjedec
|
|
m25p20-nonjedec
|
|
m25p40-nonjedec
|
|
m25p80-nonjedec
|
|
m25p16-nonjedec
|
|
m25p32-nonjedec
|
|
m25p64-nonjedec
|
|
m25p128-nonjedec
|
|
|
|
- reg : Chip-Select number
|
|
- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
|
|
|
|
Optional properties:
|
|
- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
|
|
of the usual "read" opcode. This opcode is not supported by
|
|
all chips and support for it can not be detected at runtime.
|
|
Refer to your chips' datasheet to check if this is supported
|
|
by your chip.
|
|
- broken-flash-reset : Some flash devices utilize stateful addressing modes
|
|
(e.g., for 32-bit addressing) which need to be managed
|
|
carefully by a system. Because these sorts of flash don't
|
|
have a standardized software reset command, and because some
|
|
systems don't toggle the flash RESET# pin upon system reset
|
|
(if the pin even exists at all), there are systems which
|
|
cannot reboot properly if the flash is left in the "wrong"
|
|
state. This boolean flag can be used on such systems, to
|
|
denote the absence of a reliable reset mechanism.
|
|
|
|
Example:
|
|
|
|
flash: m25p80@0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "spansion,m25p80", "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <40000000>;
|
|
m25p,fast-read;
|
|
};
|