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a5f2246fb9
nand-controller.yaml replaced nand.txt however the references to it were
not updated. This change updates these references wherever it appears in
bindings documentation.
Fixes: 212e496935 ("dt-bindings: mtd: Add YAML schemas for the generic NAND options")
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
61 lines
1.5 KiB
Plaintext
61 lines
1.5 KiB
Plaintext
Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
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This file documents the properties in addition to those available in
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the MTD NAND bindings.
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Required properties:
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- compatible : contains one of:
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- "amlogic,meson-gxl-nfc"
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- "amlogic,meson-axg-nfc"
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- clocks :
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A list of phandle + clock-specifier pairs for the clocks listed
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in clock-names.
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- clock-names: Should contain the following:
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"core" - NFC module gate clock
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"device" - device clock from eMMC sub clock controller
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"rx" - rx clock phase
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"tx" - tx clock phase
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- amlogic,mmc-syscon : Required for NAND clocks, it's shared with SD/eMMC
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controller port C
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Optional children nodes:
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Children nodes represent the available nand chips.
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Other properties:
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see Documentation/devicetree/bindings/mtd/nand-controller.yaml for generic bindings.
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Example demonstrate on AXG SoC:
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sd_emmc_c_clkc: mmc@7000 {
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compatible = "amlogic,meson-axg-mmc-clkc", "syscon";
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reg = <0x0 0x7000 0x0 0x800>;
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};
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nand-controller@7800 {
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compatible = "amlogic,meson-axg-nfc";
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reg = <0x0 0x7800 0x0 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkc CLKID_SD_EMMC_C>,
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<&sd_emmc_c_clkc CLKID_MMC_DIV>,
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<&sd_emmc_c_clkc CLKID_MMC_PHASE_RX>,
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<&sd_emmc_c_clkc CLKID_MMC_PHASE_TX>;
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clock-names = "core", "device", "rx", "tx";
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amlogic,mmc-syscon = <&sd_emmc_c_clkc>;
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pinctrl-names = "default";
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pinctrl-0 = <&nand_pins>;
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nand@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand-on-flash-bbt;
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};
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};
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