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3c8f4ad85c
Mediatek SMI has two generations of HW architecture, mt8173 uses the second generation of SMI HW while mt2701 uses the first generation HW of SMI. There's slight differences between the two generations, for generation 2, the register which control the iommu port access PA or IOVA is at each larb's register base. But for generation 1, the register is at smi ao base(smi always on register base). Besides that, the smi async clock should be prepared and enabled for SMI generation 1 HW to transform the smi clock into emi clock domain, but is not needed for SMI generation 2. This patch add SMI driver for mt2701 which use generation 1 SMI HW. Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> Signed-off-by: Joerg Roedel <jroedel@suse.de> |
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| .. | ||
| samsung | ||
| tegra | ||
| atmel-sdramc.c | ||
| emif.c | ||
| emif.h | ||
| fsl_ifc.c | ||
| fsl-corenet-cf.c | ||
| jz4780-nemc.c | ||
| Kconfig | ||
| Makefile | ||
| mtk-smi.c | ||
| mvebu-devbus.c | ||
| of_memory.c | ||
| of_memory.h | ||
| omap-gpmc.c | ||
| pl172.c | ||
| tegra20-mc.c | ||
| ti-aemif.c | ||