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3c01cf3bef
Recent versions of the Tegra MC hardware extend the size of the client ID bitfield in the MC_ERR_STATUS register by one bit. While one could simply extend the bitfield for older hardware, that would allow data from reserved bits into the driver code, which is generally a bad idea on principle. So this patch instead passes in the client ID mask from from the per-SoC MC data. There's no MC support for T210 (yet), but when that support winds up in the kernel, the appropriate soc->client_id_mask value for that chip will be 0xff. Based on an original patch by David Ung <davidu@nvidia.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: David Ung <davidu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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tegra | ||
atmel-sdramc.c | ||
emif.c | ||
emif.h | ||
fsl_ifc.c | ||
fsl-corenet-cf.c | ||
jz4780-nemc.c | ||
Kconfig | ||
Makefile | ||
mvebu-devbus.c | ||
of_memory.c | ||
of_memory.h | ||
omap-gpmc.c | ||
tegra20-mc.c | ||
ti-aemif.c |