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5ec6486daa
Currently, we support only rising edge interrupts, and in fact we assume that the interrupt we're given is rising edge (and things won't work if it's not). However, the device supports rising edge, falling edge, level low, and level high interrupts. Empirically, on my system, switching to level interrupts has fixed a problem I had with significant (~40%) interrupt loss with edge interrupts. This issue is likely related to the SoC I'm using (Allwinner H3), but being able to switch the interrupt type is still a very useful workaround. I tested this with each interrupt type and verified correct behavior in a logic analyzer. Add support for these interrupt types while also eliminating the error case of the device tree and driver using different interrupt types. Signed-off-by: Martin Kelly <mkelly@xevo.com> Acked-by: Jean-Baptiste Maneyrol <jmaneyrol@invensense.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
207 lines
5.5 KiB
C
207 lines
5.5 KiB
C
/*
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* Copyright (C) 2012 Invensense, Inc.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/delay.h>
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#include <linux/sysfs.h>
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#include <linux/jiffies.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/kfifo.h>
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#include <linux/poll.h>
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#include "inv_mpu_iio.h"
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static void inv_clear_kfifo(struct inv_mpu6050_state *st)
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{
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unsigned long flags;
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/* take the spin lock sem to avoid interrupt kick in */
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spin_lock_irqsave(&st->time_stamp_lock, flags);
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kfifo_reset(&st->timestamps);
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spin_unlock_irqrestore(&st->time_stamp_lock, flags);
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}
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int inv_reset_fifo(struct iio_dev *indio_dev)
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{
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int result;
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u8 d;
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struct inv_mpu6050_state *st = iio_priv(indio_dev);
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/* disable interrupt */
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result = regmap_write(st->map, st->reg->int_enable, 0);
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if (result) {
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dev_err(regmap_get_device(st->map), "int_enable failed %d\n",
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result);
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return result;
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}
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/* disable the sensor output to FIFO */
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result = regmap_write(st->map, st->reg->fifo_en, 0);
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if (result)
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goto reset_fifo_fail;
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/* disable fifo reading */
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result = regmap_write(st->map, st->reg->user_ctrl, 0);
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if (result)
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goto reset_fifo_fail;
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/* reset FIFO*/
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result = regmap_write(st->map, st->reg->user_ctrl,
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INV_MPU6050_BIT_FIFO_RST);
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if (result)
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goto reset_fifo_fail;
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/* clear timestamps fifo */
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inv_clear_kfifo(st);
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/* enable interrupt */
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if (st->chip_config.accl_fifo_enable ||
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st->chip_config.gyro_fifo_enable) {
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result = regmap_write(st->map, st->reg->int_enable,
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INV_MPU6050_BIT_DATA_RDY_EN);
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if (result)
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return result;
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}
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/* enable FIFO reading and I2C master interface*/
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result = regmap_write(st->map, st->reg->user_ctrl,
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INV_MPU6050_BIT_FIFO_EN);
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if (result)
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goto reset_fifo_fail;
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/* enable sensor output to FIFO */
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d = 0;
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if (st->chip_config.gyro_fifo_enable)
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d |= INV_MPU6050_BITS_GYRO_OUT;
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if (st->chip_config.accl_fifo_enable)
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d |= INV_MPU6050_BIT_ACCEL_OUT;
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result = regmap_write(st->map, st->reg->fifo_en, d);
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if (result)
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goto reset_fifo_fail;
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return 0;
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reset_fifo_fail:
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dev_err(regmap_get_device(st->map), "reset fifo failed %d\n", result);
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result = regmap_write(st->map, st->reg->int_enable,
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INV_MPU6050_BIT_DATA_RDY_EN);
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return result;
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}
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/**
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* inv_mpu6050_irq_handler() - Cache a timestamp at each data ready interrupt.
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*/
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irqreturn_t inv_mpu6050_irq_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct inv_mpu6050_state *st = iio_priv(indio_dev);
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s64 timestamp;
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timestamp = iio_get_time_ns(indio_dev);
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kfifo_in_spinlocked(&st->timestamps, ×tamp, 1,
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&st->time_stamp_lock);
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return IRQ_WAKE_THREAD;
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}
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/**
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* inv_mpu6050_read_fifo() - Transfer data from hardware FIFO to KFIFO.
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*/
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irqreturn_t inv_mpu6050_read_fifo(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct inv_mpu6050_state *st = iio_priv(indio_dev);
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size_t bytes_per_datum;
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int result;
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u8 data[INV_MPU6050_OUTPUT_DATA_SIZE];
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u16 fifo_count;
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s64 timestamp;
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int int_status;
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mutex_lock(&st->lock);
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/* ack interrupt and check status */
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result = regmap_read(st->map, st->reg->int_status, &int_status);
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if (result) {
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dev_err(regmap_get_device(st->map),
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"failed to ack interrupt\n");
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goto flush_fifo;
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}
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if (!(int_status & INV_MPU6050_BIT_RAW_DATA_RDY_INT)) {
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dev_warn(regmap_get_device(st->map),
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"spurious interrupt with status 0x%x\n", int_status);
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goto end_session;
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}
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if (!(st->chip_config.accl_fifo_enable |
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st->chip_config.gyro_fifo_enable))
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goto end_session;
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bytes_per_datum = 0;
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if (st->chip_config.accl_fifo_enable)
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bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
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if (st->chip_config.gyro_fifo_enable)
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bytes_per_datum += INV_MPU6050_BYTES_PER_3AXIS_SENSOR;
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/*
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* read fifo_count register to know how many bytes inside FIFO
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* right now
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*/
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result = regmap_bulk_read(st->map, st->reg->fifo_count_h, data,
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INV_MPU6050_FIFO_COUNT_BYTE);
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if (result)
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goto end_session;
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fifo_count = be16_to_cpup((__be16 *)(&data[0]));
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if (fifo_count < bytes_per_datum)
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goto end_session;
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/* fifo count can't be odd number, if it is odd, reset fifo*/
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if (fifo_count & 1)
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goto flush_fifo;
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if (fifo_count > INV_MPU6050_FIFO_THRESHOLD)
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goto flush_fifo;
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/* Timestamp mismatch. */
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if (kfifo_len(&st->timestamps) >
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fifo_count / bytes_per_datum + INV_MPU6050_TIME_STAMP_TOR)
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goto flush_fifo;
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while (fifo_count >= bytes_per_datum) {
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result = regmap_bulk_read(st->map, st->reg->fifo_r_w,
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data, bytes_per_datum);
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if (result)
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goto flush_fifo;
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result = kfifo_out(&st->timestamps, ×tamp, 1);
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/* when there is no timestamp, put timestamp as 0 */
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if (result == 0)
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timestamp = 0;
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iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp);
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fifo_count -= bytes_per_datum;
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}
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end_session:
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mutex_unlock(&st->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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flush_fifo:
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/* Flush HW and SW FIFOs. */
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inv_reset_fifo(indio_dev);
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mutex_unlock(&st->lock);
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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