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Each of the CPSW9G ports in J721e support additional modes like QSGMII. Add a new compatible for J721e to support the additional modes. In TI's J721e, each of the CPSW9G ethernet interfaces can act as a QSGMII main or QSGMII-SUB port. The QSGMII main interface is responsible for performing auto-negotiation between the MAC and the PHY while the rest of the interfaces are designated as QSGMII-SUB interfaces, indicating that they will not be taking part in the auto-negotiation process. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20221026074532.109220-4-s-vadapalli@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-am654-serdes.c | ||
| phy-da8xx-usb.c | ||
| phy-dm816x-usb.c | ||
| phy-gmii-sel.c | ||
| phy-j721e-wiz.c | ||
| phy-omap-control.c | ||
| phy-omap-usb2.c | ||
| phy-ti-pipe3.c | ||
| phy-tusb1210.c | ||
| phy-twl4030-usb.c | ||