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394bc7e38b
The GPIOs are access through some registers in the chip common core or over extif. We need locking around these GPIO accesses, all GPIOs are accessed through the same registers and parallel writes will cause problems. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Patchwork: http://patchwork.linux-mips.org/patch/4590 Acked-by: Florian Fainelli <florian@openwrt.org> |
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.. | ||
b43_pci_bridge.c | ||
driver_chipcommon_pmu.c | ||
driver_chipcommon.c | ||
driver_extif.c | ||
driver_gige.c | ||
driver_mipscore.c | ||
driver_pcicore.c | ||
embedded.c | ||
Kconfig | ||
main.c | ||
Makefile | ||
pci.c | ||
pcihost_wrapper.c | ||
pcmcia.c | ||
scan.c | ||
sdio.c | ||
sprom.c | ||
ssb_private.h |