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8a8449ca5e
Modify interrupt service routines for INTx, MSI, and MSI-x to support multiqueue. Modify parameter list of fnic_wq_copy_cmpl_handler to take cq_index. Modify fnic_cleanup function to use the new function call of fnic_wq_copy_cmpl_handler. Refactor code to set interrupt mode to MSI-x to a new function. Add a new stat for intx_dummy. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202310251847.4T8BVZAZ-lkp@intel.com/ Reviewed-by: Sesidhar Baddela <sebaddel@cisco.com> Reviewed-by: Arulprabhu Ponnusamy <arulponn@cisco.com> Signed-off-by: Karan Tilak Kumar <kartilak@cisco.com> Link: https://lore.kernel.org/r/20231211173617.932990-8-kartilak@cisco.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
397 lines
10 KiB
C
397 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright 2008 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*/
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#include <linux/string.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <scsi/libfc.h>
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#include <scsi/fc_frame.h>
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#include "vnic_dev.h"
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#include "vnic_intr.h"
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#include "vnic_stats.h"
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#include "fnic_io.h"
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#include "fnic.h"
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static irqreturn_t fnic_isr_legacy(int irq, void *data)
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{
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struct fnic *fnic = data;
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u32 pba;
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unsigned long work_done = 0;
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pba = vnic_intr_legacy_pba(fnic->legacy_pba);
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if (!pba)
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return IRQ_NONE;
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fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
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atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
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if (pba & (1 << FNIC_INTX_NOTIFY)) {
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vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]);
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fnic_handle_link_event(fnic);
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}
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if (pba & (1 << FNIC_INTX_ERR)) {
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vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]);
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fnic_log_q_error(fnic);
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}
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if (pba & (1 << FNIC_INTX_DUMMY)) {
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atomic64_inc(&fnic->fnic_stats.misc_stats.intx_dummy);
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vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_DUMMY]);
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}
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if (pba & (1 << FNIC_INTX_WQ_RQ_COPYWQ)) {
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work_done += fnic_wq_copy_cmpl_handler(fnic, io_completions, FNIC_MQ_CQ_INDEX);
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work_done += fnic_wq_cmpl_handler(fnic, -1);
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work_done += fnic_rq_cmpl_handler(fnic, -1);
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vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ],
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work_done,
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1 /* unmask intr */,
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1 /* reset intr timer */);
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}
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return IRQ_HANDLED;
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}
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static irqreturn_t fnic_isr_msi(int irq, void *data)
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{
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struct fnic *fnic = data;
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unsigned long work_done = 0;
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fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
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atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
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work_done += fnic_wq_copy_cmpl_handler(fnic, io_completions, FNIC_MQ_CQ_INDEX);
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work_done += fnic_wq_cmpl_handler(fnic, -1);
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work_done += fnic_rq_cmpl_handler(fnic, -1);
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vnic_intr_return_credits(&fnic->intr[0],
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work_done,
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1 /* unmask intr */,
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1 /* reset intr timer */);
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return IRQ_HANDLED;
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}
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static irqreturn_t fnic_isr_msix_rq(int irq, void *data)
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{
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struct fnic *fnic = data;
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unsigned long rq_work_done = 0;
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fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
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atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
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rq_work_done = fnic_rq_cmpl_handler(fnic, -1);
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vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_RQ],
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rq_work_done,
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1 /* unmask intr */,
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1 /* reset intr timer */);
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return IRQ_HANDLED;
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}
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static irqreturn_t fnic_isr_msix_wq(int irq, void *data)
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{
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struct fnic *fnic = data;
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unsigned long wq_work_done = 0;
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fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
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atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
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wq_work_done = fnic_wq_cmpl_handler(fnic, -1);
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vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_WQ],
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wq_work_done,
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1 /* unmask intr */,
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1 /* reset intr timer */);
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return IRQ_HANDLED;
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}
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static irqreturn_t fnic_isr_msix_wq_copy(int irq, void *data)
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{
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struct fnic *fnic = data;
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unsigned long wq_copy_work_done = 0;
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int i;
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fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
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atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
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i = irq - fnic->msix[0].irq_num;
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if (i >= fnic->wq_copy_count + fnic->copy_wq_base ||
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i < 0 || fnic->msix[i].irq_num != irq) {
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for (i = fnic->copy_wq_base; i < fnic->wq_copy_count + fnic->copy_wq_base ; i++) {
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if (fnic->msix[i].irq_num == irq)
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break;
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}
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}
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wq_copy_work_done = fnic_wq_copy_cmpl_handler(fnic, io_completions, i);
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vnic_intr_return_credits(&fnic->intr[i],
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wq_copy_work_done,
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1 /* unmask intr */,
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1 /* reset intr timer */);
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return IRQ_HANDLED;
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}
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static irqreturn_t fnic_isr_msix_err_notify(int irq, void *data)
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{
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struct fnic *fnic = data;
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fnic->fnic_stats.misc_stats.last_isr_time = jiffies;
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atomic64_inc(&fnic->fnic_stats.misc_stats.isr_count);
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vnic_intr_return_all_credits(&fnic->intr[fnic->err_intr_offset]);
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fnic_log_q_error(fnic);
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fnic_handle_link_event(fnic);
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return IRQ_HANDLED;
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}
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void fnic_free_intr(struct fnic *fnic)
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{
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int i;
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switch (vnic_dev_get_intr_mode(fnic->vdev)) {
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case VNIC_DEV_INTR_MODE_INTX:
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case VNIC_DEV_INTR_MODE_MSI:
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free_irq(pci_irq_vector(fnic->pdev, 0), fnic);
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break;
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case VNIC_DEV_INTR_MODE_MSIX:
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for (i = 0; i < ARRAY_SIZE(fnic->msix); i++)
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if (fnic->msix[i].requested)
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free_irq(pci_irq_vector(fnic->pdev, i),
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fnic->msix[i].devid);
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break;
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default:
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break;
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}
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}
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int fnic_request_intr(struct fnic *fnic)
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{
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int err = 0;
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int i;
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switch (vnic_dev_get_intr_mode(fnic->vdev)) {
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case VNIC_DEV_INTR_MODE_INTX:
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err = request_irq(pci_irq_vector(fnic->pdev, 0),
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&fnic_isr_legacy, IRQF_SHARED, DRV_NAME, fnic);
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break;
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case VNIC_DEV_INTR_MODE_MSI:
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err = request_irq(pci_irq_vector(fnic->pdev, 0), &fnic_isr_msi,
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0, fnic->name, fnic);
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break;
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case VNIC_DEV_INTR_MODE_MSIX:
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sprintf(fnic->msix[FNIC_MSIX_RQ].devname,
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"%.11s-fcs-rq", fnic->name);
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fnic->msix[FNIC_MSIX_RQ].isr = fnic_isr_msix_rq;
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fnic->msix[FNIC_MSIX_RQ].devid = fnic;
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sprintf(fnic->msix[FNIC_MSIX_WQ].devname,
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"%.11s-fcs-wq", fnic->name);
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fnic->msix[FNIC_MSIX_WQ].isr = fnic_isr_msix_wq;
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fnic->msix[FNIC_MSIX_WQ].devid = fnic;
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for (i = fnic->copy_wq_base; i < fnic->wq_copy_count + fnic->copy_wq_base; i++) {
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sprintf(fnic->msix[i].devname,
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"%.11s-scsi-wq-%d", fnic->name, i-FNIC_MSIX_WQ_COPY);
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fnic->msix[i].isr = fnic_isr_msix_wq_copy;
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fnic->msix[i].devid = fnic;
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}
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sprintf(fnic->msix[fnic->err_intr_offset].devname,
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"%.11s-err-notify", fnic->name);
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fnic->msix[fnic->err_intr_offset].isr =
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fnic_isr_msix_err_notify;
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fnic->msix[fnic->err_intr_offset].devid = fnic;
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for (i = 0; i < fnic->intr_count; i++) {
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fnic->msix[i].irq_num = pci_irq_vector(fnic->pdev, i);
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err = request_irq(fnic->msix[i].irq_num,
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fnic->msix[i].isr, 0,
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fnic->msix[i].devname,
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fnic->msix[i].devid);
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if (err) {
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FNIC_ISR_DBG(KERN_ERR, fnic->lport->host, fnic->fnic_num,
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"request_irq failed with error: %d\n",
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err);
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fnic_free_intr(fnic);
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break;
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}
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fnic->msix[i].requested = 1;
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}
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break;
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default:
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break;
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}
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return err;
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}
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int fnic_set_intr_mode_msix(struct fnic *fnic)
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{
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unsigned int n = ARRAY_SIZE(fnic->rq);
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unsigned int m = ARRAY_SIZE(fnic->wq);
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unsigned int o = ARRAY_SIZE(fnic->hw_copy_wq);
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unsigned int min_irqs = n + m + 1 + 1; /*rq, raw wq, wq, err*/
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/*
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* We need n RQs, m WQs, o Copy WQs, n+m+o CQs, and n+m+o+1 INTRs
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* (last INTR is used for WQ/RQ errors and notification area)
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*/
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"rq-array size: %d wq-array size: %d copy-wq array size: %d\n",
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n, m, o);
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"rq_count: %d raw_wq_count: %d wq_copy_count: %d cq_count: %d\n",
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fnic->rq_count, fnic->raw_wq_count,
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fnic->wq_copy_count, fnic->cq_count);
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if (fnic->rq_count <= n && fnic->raw_wq_count <= m &&
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fnic->wq_copy_count <= o) {
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int vec_count = 0;
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int vecs = fnic->rq_count + fnic->raw_wq_count + fnic->wq_copy_count + 1;
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vec_count = pci_alloc_irq_vectors(fnic->pdev, min_irqs, vecs,
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PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"allocated %d MSI-X vectors\n",
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vec_count);
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if (vec_count > 0) {
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if (vec_count < vecs) {
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FNIC_ISR_DBG(KERN_ERR, fnic->lport->host, fnic->fnic_num,
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"interrupts number mismatch: vec_count: %d vecs: %d\n",
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vec_count, vecs);
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if (vec_count < min_irqs) {
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FNIC_ISR_DBG(KERN_ERR, fnic->lport->host, fnic->fnic_num,
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"no interrupts for copy wq\n");
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return 1;
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}
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}
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fnic->rq_count = n;
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fnic->raw_wq_count = m;
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fnic->copy_wq_base = fnic->rq_count + fnic->raw_wq_count;
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fnic->wq_copy_count = vec_count - n - m - 1;
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fnic->wq_count = fnic->raw_wq_count + fnic->wq_copy_count;
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if (fnic->cq_count != vec_count - 1) {
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FNIC_ISR_DBG(KERN_ERR, fnic->lport->host, fnic->fnic_num,
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"CQ count: %d does not match MSI-X vector count: %d\n",
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fnic->cq_count, vec_count);
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fnic->cq_count = vec_count - 1;
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}
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fnic->intr_count = vec_count;
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fnic->err_intr_offset = fnic->rq_count + fnic->wq_count;
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"rq_count: %d raw_wq_count: %d copy_wq_base: %d\n",
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fnic->rq_count,
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fnic->raw_wq_count, fnic->copy_wq_base);
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"wq_copy_count: %d wq_count: %d cq_count: %d\n",
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fnic->wq_copy_count,
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fnic->wq_count, fnic->cq_count);
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"intr_count: %d err_intr_offset: %u",
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fnic->intr_count,
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fnic->err_intr_offset);
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vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_MSIX);
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FNIC_ISR_DBG(KERN_INFO, fnic->lport->host, fnic->fnic_num,
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"fnic using MSI-X\n");
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return 0;
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}
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}
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return 1;
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}
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int fnic_set_intr_mode(struct fnic *fnic)
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{
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int ret_status = 0;
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/*
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* Set interrupt mode (INTx, MSI, MSI-X) depending
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* system capabilities.
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*
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* Try MSI-X first
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*/
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ret_status = fnic_set_intr_mode_msix(fnic);
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if (ret_status == 0)
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return ret_status;
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/*
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* Next try MSI
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* We need 1 RQ, 1 WQ, 1 WQ_COPY, 3 CQs, and 1 INTR
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*/
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if (fnic->rq_count >= 1 &&
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fnic->raw_wq_count >= 1 &&
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fnic->wq_copy_count >= 1 &&
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fnic->cq_count >= 3 &&
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fnic->intr_count >= 1 &&
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pci_alloc_irq_vectors(fnic->pdev, 1, 1, PCI_IRQ_MSI) == 1) {
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fnic->rq_count = 1;
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fnic->raw_wq_count = 1;
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fnic->wq_copy_count = 1;
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fnic->wq_count = 2;
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fnic->cq_count = 3;
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fnic->intr_count = 1;
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fnic->err_intr_offset = 0;
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FNIC_ISR_DBG(KERN_DEBUG, fnic->lport->host, fnic->fnic_num,
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"Using MSI Interrupts\n");
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vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_MSI);
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return 0;
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}
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/*
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* Next try INTx
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* We need 1 RQ, 1 WQ, 1 WQ_COPY, 3 CQs, and 3 INTRs
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* 1 INTR is used for all 3 queues, 1 INTR for queue errors
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* 1 INTR for notification area
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*/
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if (fnic->rq_count >= 1 &&
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fnic->raw_wq_count >= 1 &&
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fnic->wq_copy_count >= 1 &&
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fnic->cq_count >= 3 &&
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fnic->intr_count >= 3) {
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fnic->rq_count = 1;
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fnic->raw_wq_count = 1;
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fnic->wq_copy_count = 1;
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fnic->cq_count = 3;
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fnic->intr_count = 3;
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FNIC_ISR_DBG(KERN_DEBUG, fnic->lport->host, fnic->fnic_num,
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"Using Legacy Interrupts\n");
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vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_INTX);
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return 0;
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}
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vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
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return -EINVAL;
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}
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void fnic_clear_intr_mode(struct fnic *fnic)
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{
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pci_free_irq_vectors(fnic->pdev);
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vnic_dev_set_intr_mode(fnic->vdev, VNIC_DEV_INTR_MODE_INTX);
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}
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