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387da6bc7a
As reported by a comment in the c_can_start_xmit() this was not a FIFO. C/D_CAN controller sends out the buffers prioritized so that the lowest buffer number wins. What did c_can_start_xmit() do if head was less tail in the tx ring ? It waited until all the frames queued in the FIFO was actually transmitted by the controller before accepting a new CAN frame to transmit, even if the FIFO was not full, to ensure that the messages were transmitted in the order in which they were loaded. By storing the frames in the FIFO without requiring its transmission, we will be able to use the full size of the FIFO even in cases such as the one described above. The transmission interrupt will trigger their transmission only when all the messages previously loaded but stored in less priority positions of the buffers have been transmitted. Link: https://lore.kernel.org/r/20210807130800.5246-5-dariobin@libero.it Suggested-by: Gianluca Falavigna <gianluca.falavigna@inwind.it> Signed-off-by: Dario Binacchi <dariobin@libero.it> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> |
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| .. | ||
| c_can | ||
| cc770 | ||
| dev | ||
| ifi_canfd | ||
| m_can | ||
| mscan | ||
| peak_canfd | ||
| rcar | ||
| sja1000 | ||
| softing | ||
| spi | ||
| usb | ||
| at91_can.c | ||
| flexcan.c | ||
| grcan.c | ||
| janz-ican3.c | ||
| Kconfig | ||
| kvaser_pciefd.c | ||
| led.c | ||
| Makefile | ||
| pch_can.c | ||
| slcan.c | ||
| sun4i_can.c | ||
| ti_hecc.c | ||
| vcan.c | ||
| vxcan.c | ||
| xilinx_can.c | ||