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In pmu_disable() we disable the PMU by setting the FC (Freeze Counters) bit in MMCR0. In order to do this we have to read/modify/write MMCR0. It's possible that we read a value from MMCR0 which has PMAO (PMU Alert Occurred) set. When we write that value back it will cause an interrupt to occur. We will then end up in the PMU interrupt handler even though we are supposed to have just disabled the PMU. We can avoid this by making sure we never write PMAO back. We should not lose interrupts because when the PMU is re-enabled the overflowed values will cause another interrupt. We also reorder the clearing of SAMPLE_ENABLE so that is done after the PMU is frozen. Otherwise there is a small window between the clearing of SAMPLE_ENABLE and the setting of FC where we could take an interrupt and incorrectly see SAMPLE_ENABLE not set. This would for example change the logic in perf_read_regs(). Signed-off-by: Michael Ellerman <michael@ellerman.id.au> CC: <stable@vger.kernel.org> [v3.10] Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> |
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| .. | ||
| bhrb.S | ||
| callchain.c | ||
| core-book3s.c | ||
| core-fsl-emb.c | ||
| e500-pmu.c | ||
| Makefile | ||
| mpc7450-pmu.c | ||
| power4-pmu.c | ||
| power5-pmu.c | ||
| power5+-pmu.c | ||
| power6-pmu.c | ||
| power7-pmu.c | ||
| power8-pmu.c | ||
| ppc970-pmu.c | ||