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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
50 lines
1.5 KiB
C
50 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2014 Imagination Technologies
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* Author: Paul Burton <paul.burton@mips.com>
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*/
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#ifndef __MIPS_ASM_PM_CPS_H__
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#define __MIPS_ASM_PM_CPS_H__
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/*
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* The CM & CPC can only handle coherence & power control on a per-core basis,
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* thus in an MT system the VP(E)s within each core are coupled and can only
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* enter or exit states requiring CM or CPC assistance in unison.
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*/
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#if defined(CONFIG_CPU_MIPSR6)
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# define coupled_coherence cpu_has_vp
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#elif defined(CONFIG_MIPS_MT)
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# define coupled_coherence cpu_has_mipsmt
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#else
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# define coupled_coherence 0
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#endif
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/* Enumeration of possible PM states */
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enum cps_pm_state {
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CPS_PM_NC_WAIT, /* MIPS wait instruction, non-coherent */
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CPS_PM_CLOCK_GATED, /* Core clock gated */
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CPS_PM_POWER_GATED, /* Core power gated */
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CPS_PM_STATE_COUNT,
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};
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/**
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* cps_pm_support_state - determine whether the system supports a PM state
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* @state: the state to test for support
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*
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* Returns true if the system supports the given state, otherwise false.
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*/
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extern bool cps_pm_support_state(enum cps_pm_state state);
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/**
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* cps_pm_enter_state - enter a PM state
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* @state: the state to enter
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*
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* Enter the given PM state. If coupled_coherence is non-zero then it is
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* expected that this function be called at approximately the same time on
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* each coupled CPU. Returns 0 on successful entry & exit, otherwise -errno.
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*/
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extern int cps_pm_enter_state(enum cps_pm_state state);
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#endif /* __MIPS_ASM_PM_CPS_H__ */
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