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Since d4a45c68dc ("irqdomain: Protect the linear revmap with RCU"),
any irqdomain lookup requires the RCU read lock to be held.
This assumes that the architecture code will be structured such as
irq_enter() will be called *before* the interrupt is looked up
in the irq domain. However, this isn't the case for MIPS, and a number
of drivers are structured to do it the other way around when handling
an interrupt in their root irqchip (secondary irqchips are OK by
construction).
This results in a RCU splat on a lockdep-enabled kernel when the kernel
takes an interrupt from idle, as reported by Guenter Roeck.
Note that this could have fired previously if any driver had used
tree-based irqdomain, which always had the RCU requirement.
To solve this, provide a MIPS-specific helper (do_domain_IRQ())
as the pendent of do_IRQ() that will do thing in the right order
(and maybe save some cycles in the process).
Ideally, MIPS would be moved over to using handle_domain_irq(),
but that's much more ambitious.
Reported-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Guenter Roeck <linux@roeck-us.net>
[maz: add dependency on CONFIG_IRQ_DOMAIN after report from the kernelci bot]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20210705172352.GA56304@roeck-us.net
Link: https://lore.kernel.org/r/20210706110647.3979002-1-maz@kernel.org
89 lines
2.4 KiB
C
89 lines
2.4 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1994 by Waldorf GMBH, written by Ralf Baechle
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* Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
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*/
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#ifndef _ASM_IRQ_H
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#define _ASM_IRQ_H
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#include <linux/linkage.h>
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#include <linux/smp.h>
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#include <asm/mipsmtregs.h>
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#include <irq.h>
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#define IRQ_STACK_SIZE THREAD_SIZE
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#define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
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extern void __init init_IRQ(void);
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extern void *irq_stack[NR_CPUS];
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/*
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* The highest address on the IRQ stack contains a dummy frame put down in
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* genex.S (handle_int & except_vec_vi_handler) which is structured as follows:
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*
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* top ------------
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* | task sp | <- irq_stack[cpu] + IRQ_STACK_START
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* ------------
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* | | <- First frame of IRQ context
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* ------------
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*
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* task sp holds a copy of the task stack pointer where the struct pt_regs
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* from exception entry can be found.
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*/
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static inline bool on_irq_stack(int cpu, unsigned long sp)
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{
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unsigned long low = (unsigned long)irq_stack[cpu];
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unsigned long high = low + IRQ_STACK_SIZE;
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return (low <= sp && sp <= high);
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}
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#ifdef CONFIG_I8259
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static inline int irq_canonicalize(int irq)
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{
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return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq);
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}
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#else
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#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
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#endif
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asmlinkage void plat_irq_dispatch(void);
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extern void do_IRQ(unsigned int irq);
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struct irq_domain;
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extern void do_domain_IRQ(struct irq_domain *domain, unsigned int irq);
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extern void arch_init_irq(void);
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extern void spurious_interrupt(void);
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extern int allocate_irqno(void);
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extern void alloc_legacy_irqno(void);
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extern void free_irqno(unsigned int irq);
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/*
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* Before R2 the timer and performance counter interrupts were both fixed to
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* IE7. Since R2 their number has to be read from the c0_intctl register.
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*/
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#define CP0_LEGACY_COMPARE_IRQ 7
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#define CP0_LEGACY_PERFCNT_IRQ 7
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extern int cp0_compare_irq;
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extern int cp0_compare_irq_shift;
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extern int cp0_perfcount_irq;
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extern int cp0_fdc_irq;
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extern int get_c0_fdc_int(void);
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void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
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bool exclude_self);
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#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
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#endif /* _ASM_IRQ_H */
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