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c372a35550
When transitioning to supend state, uniphier_aio_dai_suspend() is called
and asserts reset lines and disables clocks.
However, if there are two or more DAIs, uniphier_aio_dai_suspend() are
called multiple times, and double reset assersion will cause.
This patch defines the counter that has the number of DAIs at first, and
whenever uniphier_aio_dai_suspend() are called, it decrements the
counter. And only if the counter is zero, it asserts reset lines and
disables clocks.
In the same way, uniphier_aio_dai_resume() are called, it increments the
counter after deasserting reset lines and enabling clocks.
Fixes: 139a342002
("ASoC: uniphier: add support for UniPhier AIO CPU DAI driver")
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1566281764-14059-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Mark Brown <broonie@kernel.org>
714 lines
16 KiB
C
714 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Socionext UniPhier AIO ALSA CPU DAI driver.
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//
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// Copyright (c) 2016-2018 Socionext Inc.
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#include <linux/clk.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "aio.h"
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static bool is_valid_pll(struct uniphier_aio_chip *chip, int pll_id)
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{
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struct device *dev = &chip->pdev->dev;
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if (pll_id < 0 || chip->num_plls <= pll_id) {
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dev_err(dev, "PLL(%d) is not supported\n", pll_id);
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return false;
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}
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return chip->plls[pll_id].enable;
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}
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/**
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* find_volume - find volume supported HW port by HW port number
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* @chip: the AIO chip pointer
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* @oport_hw: HW port number, one of AUD_HW_XXXX
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*
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* Find AIO device from device list by HW port number. Volume feature is
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* available only in Output and PCM ports, this limitation comes from HW
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* specifications.
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*
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* Return: The pointer of AIO substream if successful, otherwise NULL on error.
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*/
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static struct uniphier_aio_sub *find_volume(struct uniphier_aio_chip *chip,
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int oport_hw)
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{
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int i;
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for (i = 0; i < chip->num_aios; i++) {
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struct uniphier_aio_sub *sub = &chip->aios[i].sub[0];
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if (!sub->swm)
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continue;
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if (sub->swm->oport.hw == oport_hw)
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return sub;
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}
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return NULL;
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}
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static bool match_spec(const struct uniphier_aio_spec *spec,
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const char *name, int dir)
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{
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if (dir == SNDRV_PCM_STREAM_PLAYBACK &&
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spec->swm.dir != PORT_DIR_OUTPUT) {
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return false;
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}
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if (dir == SNDRV_PCM_STREAM_CAPTURE &&
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spec->swm.dir != PORT_DIR_INPUT) {
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return false;
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}
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if (spec->name && strcmp(spec->name, name) == 0)
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return true;
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if (spec->gname && strcmp(spec->gname, name) == 0)
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return true;
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return false;
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}
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/**
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* find_spec - find HW specification info by name
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* @aio: the AIO device pointer
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* @name: name of device
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* @direction: the direction of substream, SNDRV_PCM_STREAM_*
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*
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* Find hardware specification information from list by device name. This
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* information is used for telling the difference of SoCs to driver.
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*
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* Specification list is array of 'struct uniphier_aio_spec' which is defined
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* in each drivers (see: aio-i2s.c).
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*
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* Return: The pointer of hardware specification of AIO if successful,
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* otherwise NULL on error.
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*/
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static const struct uniphier_aio_spec *find_spec(struct uniphier_aio *aio,
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const char *name,
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int direction)
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{
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const struct uniphier_aio_chip_spec *chip_spec = aio->chip->chip_spec;
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int i;
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for (i = 0; i < chip_spec->num_specs; i++) {
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const struct uniphier_aio_spec *spec = &chip_spec->specs[i];
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if (match_spec(spec, name, direction))
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return spec;
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}
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return NULL;
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}
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/**
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* find_divider - find clock divider by frequency
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* @aio: the AIO device pointer
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* @pll_id: PLL ID, should be AUD_PLL_XX
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* @freq: required frequency
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*
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* Find suitable clock divider by frequency.
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*
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* Return: The ID of PLL if successful, otherwise negative error value.
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*/
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static int find_divider(struct uniphier_aio *aio, int pll_id, unsigned int freq)
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{
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struct uniphier_aio_pll *pll;
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int mul[] = { 1, 1, 1, 2, };
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int div[] = { 2, 3, 1, 3, };
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int i;
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if (!is_valid_pll(aio->chip, pll_id))
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return -EINVAL;
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pll = &aio->chip->plls[pll_id];
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for (i = 0; i < ARRAY_SIZE(mul); i++)
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if (pll->freq * mul[i] / div[i] == freq)
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return i;
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return -ENOTSUPP;
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}
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static int uniphier_aio_set_sysclk(struct snd_soc_dai *dai, int clk_id,
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unsigned int freq, int dir)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct device *dev = &aio->chip->pdev->dev;
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bool pll_auto = false;
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int pll_id, div_id;
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switch (clk_id) {
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case AUD_CLK_IO:
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return -ENOTSUPP;
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case AUD_CLK_A1:
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pll_id = AUD_PLL_A1;
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break;
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case AUD_CLK_F1:
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pll_id = AUD_PLL_F1;
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break;
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case AUD_CLK_A2:
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pll_id = AUD_PLL_A2;
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break;
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case AUD_CLK_F2:
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pll_id = AUD_PLL_F2;
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break;
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case AUD_CLK_A:
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pll_id = AUD_PLL_A1;
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pll_auto = true;
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break;
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case AUD_CLK_F:
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pll_id = AUD_PLL_F1;
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pll_auto = true;
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break;
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case AUD_CLK_APLL:
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pll_id = AUD_PLL_APLL;
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break;
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case AUD_CLK_RX0:
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pll_id = AUD_PLL_RX0;
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break;
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case AUD_CLK_USB0:
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pll_id = AUD_PLL_USB0;
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break;
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case AUD_CLK_HSC0:
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pll_id = AUD_PLL_HSC0;
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break;
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default:
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dev_err(dev, "Sysclk(%d) is not supported\n", clk_id);
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return -EINVAL;
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}
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if (pll_auto) {
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for (pll_id = 0; pll_id < aio->chip->num_plls; pll_id++) {
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div_id = find_divider(aio, pll_id, freq);
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if (div_id >= 0) {
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aio->plldiv = div_id;
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break;
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}
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}
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if (pll_id == aio->chip->num_plls) {
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dev_err(dev, "Sysclk frequency is not supported(%d)\n",
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freq);
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return -EINVAL;
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}
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}
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if (dir == SND_SOC_CLOCK_OUT)
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aio->pll_out = pll_id;
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else
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aio->pll_in = pll_id;
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return 0;
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}
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static int uniphier_aio_set_pll(struct snd_soc_dai *dai, int pll_id,
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int source, unsigned int freq_in,
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unsigned int freq_out)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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int ret;
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if (!is_valid_pll(aio->chip, pll_id))
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return -EINVAL;
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ret = aio_chip_set_pll(aio->chip, pll_id, freq_out);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int uniphier_aio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct device *dev = &aio->chip->pdev->dev;
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_LEFT_J:
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case SND_SOC_DAIFMT_RIGHT_J:
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case SND_SOC_DAIFMT_I2S:
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aio->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
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break;
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default:
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dev_err(dev, "Format is not supported(%d)\n",
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fmt & SND_SOC_DAIFMT_FORMAT_MASK);
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return -EINVAL;
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}
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return 0;
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}
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static int uniphier_aio_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
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int ret;
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sub->substream = substream;
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sub->pass_through = 0;
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sub->use_mmap = true;
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ret = aio_init(sub);
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if (ret)
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return ret;
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return 0;
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}
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static void uniphier_aio_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
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sub->substream = NULL;
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}
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static int uniphier_aio_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
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struct device *dev = &aio->chip->pdev->dev;
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int freq, ret;
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switch (params_rate(params)) {
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case 48000:
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case 32000:
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case 24000:
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freq = 12288000;
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break;
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case 44100:
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case 22050:
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freq = 11289600;
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break;
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default:
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dev_err(dev, "Rate is not supported(%d)\n",
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params_rate(params));
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return -EINVAL;
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}
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ret = snd_soc_dai_set_sysclk(dai, AUD_CLK_A,
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freq, SND_SOC_CLOCK_OUT);
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if (ret)
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return ret;
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sub->params = *params;
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sub->setting = 1;
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aio_port_reset(sub);
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aio_port_set_volume(sub, sub->vol);
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aio_src_reset(sub);
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return 0;
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}
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static int uniphier_aio_hw_free(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
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sub->setting = 0;
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return 0;
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}
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static int uniphier_aio_prepare(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
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int ret;
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ret = aio_port_set_param(sub, sub->pass_through, &sub->params);
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if (ret)
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return ret;
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ret = aio_src_set_param(sub, &sub->params);
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if (ret)
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return ret;
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aio_port_set_enable(sub, 1);
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ret = aio_if_set_param(sub, sub->pass_through);
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if (ret)
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return ret;
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if (sub->swm->type == PORT_TYPE_CONV) {
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ret = aio_srcif_set_param(sub);
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if (ret)
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return ret;
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ret = aio_srcch_set_param(sub);
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if (ret)
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return ret;
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aio_srcch_set_enable(sub, 1);
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}
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return 0;
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}
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const struct snd_soc_dai_ops uniphier_aio_i2s_ops = {
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.set_sysclk = uniphier_aio_set_sysclk,
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.set_pll = uniphier_aio_set_pll,
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.set_fmt = uniphier_aio_set_fmt,
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.startup = uniphier_aio_startup,
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.shutdown = uniphier_aio_shutdown,
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.hw_params = uniphier_aio_hw_params,
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.hw_free = uniphier_aio_hw_free,
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.prepare = uniphier_aio_prepare,
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};
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EXPORT_SYMBOL_GPL(uniphier_aio_i2s_ops);
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const struct snd_soc_dai_ops uniphier_aio_spdif_ops = {
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.set_sysclk = uniphier_aio_set_sysclk,
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.set_pll = uniphier_aio_set_pll,
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.startup = uniphier_aio_startup,
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.shutdown = uniphier_aio_shutdown,
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.hw_params = uniphier_aio_hw_params,
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.hw_free = uniphier_aio_hw_free,
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.prepare = uniphier_aio_prepare,
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};
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EXPORT_SYMBOL_GPL(uniphier_aio_spdif_ops);
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int uniphier_aio_dai_probe(struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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int i;
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for (i = 0; i < ARRAY_SIZE(aio->sub); i++) {
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struct uniphier_aio_sub *sub = &aio->sub[i];
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const struct uniphier_aio_spec *spec;
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spec = find_spec(aio, dai->name, i);
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if (!spec)
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continue;
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sub->swm = &spec->swm;
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sub->spec = spec;
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sub->vol = AUD_VOL_INIT;
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}
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aio_iecout_set_enable(aio->chip, true);
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aio_chip_init(aio->chip);
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aio->chip->active = 1;
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return 0;
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}
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EXPORT_SYMBOL_GPL(uniphier_aio_dai_probe);
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int uniphier_aio_dai_remove(struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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aio->chip->active = 0;
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return 0;
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}
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EXPORT_SYMBOL_GPL(uniphier_aio_dai_remove);
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int uniphier_aio_dai_suspend(struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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aio->chip->num_wup_aios--;
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if (!aio->chip->num_wup_aios) {
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reset_control_assert(aio->chip->rst);
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clk_disable_unprepare(aio->chip->clk);
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(uniphier_aio_dai_suspend);
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int uniphier_aio_dai_resume(struct snd_soc_dai *dai)
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{
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struct uniphier_aio *aio = uniphier_priv(dai);
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int ret, i;
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if (!aio->chip->active)
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return 0;
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if (!aio->chip->num_wup_aios) {
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ret = clk_prepare_enable(aio->chip->clk);
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if (ret)
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return ret;
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ret = reset_control_deassert(aio->chip->rst);
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if (ret)
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goto err_out_clock;
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}
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aio_iecout_set_enable(aio->chip, true);
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aio_chip_init(aio->chip);
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for (i = 0; i < ARRAY_SIZE(aio->sub); i++) {
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struct uniphier_aio_sub *sub = &aio->sub[i];
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if (!sub->spec || !sub->substream)
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continue;
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ret = aio_init(sub);
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if (ret)
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goto err_out_reset;
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if (!sub->setting)
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continue;
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aio_port_reset(sub);
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aio_src_reset(sub);
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}
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aio->chip->num_wup_aios++;
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return 0;
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err_out_reset:
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if (!aio->chip->num_wup_aios)
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reset_control_assert(aio->chip->rst);
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err_out_clock:
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if (!aio->chip->num_wup_aios)
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clk_disable_unprepare(aio->chip->clk);
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return ret;
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}
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EXPORT_SYMBOL_GPL(uniphier_aio_dai_resume);
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static int uniphier_aio_vol_info(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_info *uinfo)
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{
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uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
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uinfo->count = 1;
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uinfo->value.integer.min = 0;
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uinfo->value.integer.max = AUD_VOL_MAX;
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return 0;
|
|
}
|
|
|
|
static int uniphier_aio_vol_get(struct snd_kcontrol *kcontrol,
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
|
|
struct uniphier_aio_chip *chip = snd_soc_component_get_drvdata(comp);
|
|
struct uniphier_aio_sub *sub;
|
|
int oport_hw = kcontrol->private_value;
|
|
|
|
sub = find_volume(chip, oport_hw);
|
|
if (!sub)
|
|
return 0;
|
|
|
|
ucontrol->value.integer.value[0] = sub->vol;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uniphier_aio_vol_put(struct snd_kcontrol *kcontrol,
|
|
struct snd_ctl_elem_value *ucontrol)
|
|
{
|
|
struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
|
|
struct uniphier_aio_chip *chip = snd_soc_component_get_drvdata(comp);
|
|
struct uniphier_aio_sub *sub;
|
|
int oport_hw = kcontrol->private_value;
|
|
|
|
sub = find_volume(chip, oport_hw);
|
|
if (!sub)
|
|
return 0;
|
|
|
|
if (sub->vol == ucontrol->value.integer.value[0])
|
|
return 0;
|
|
sub->vol = ucontrol->value.integer.value[0];
|
|
|
|
aio_port_set_volume(sub, sub->vol);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct snd_kcontrol_new uniphier_aio_controls[] = {
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
|
|
.name = "HPCMOUT1 Volume",
|
|
.info = uniphier_aio_vol_info,
|
|
.get = uniphier_aio_vol_get,
|
|
.put = uniphier_aio_vol_put,
|
|
.private_value = AUD_HW_HPCMOUT1,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
|
|
.name = "PCMOUT1 Volume",
|
|
.info = uniphier_aio_vol_info,
|
|
.get = uniphier_aio_vol_get,
|
|
.put = uniphier_aio_vol_put,
|
|
.private_value = AUD_HW_PCMOUT1,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
|
|
.name = "PCMOUT2 Volume",
|
|
.info = uniphier_aio_vol_info,
|
|
.get = uniphier_aio_vol_get,
|
|
.put = uniphier_aio_vol_put,
|
|
.private_value = AUD_HW_PCMOUT2,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
|
|
.name = "PCMOUT3 Volume",
|
|
.info = uniphier_aio_vol_info,
|
|
.get = uniphier_aio_vol_get,
|
|
.put = uniphier_aio_vol_put,
|
|
.private_value = AUD_HW_PCMOUT3,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
|
|
.name = "HIECOUT1 Volume",
|
|
.info = uniphier_aio_vol_info,
|
|
.get = uniphier_aio_vol_get,
|
|
.put = uniphier_aio_vol_put,
|
|
.private_value = AUD_HW_HIECOUT1,
|
|
},
|
|
{
|
|
.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
|
|
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
|
|
.name = "IECOUT1 Volume",
|
|
.info = uniphier_aio_vol_info,
|
|
.get = uniphier_aio_vol_get,
|
|
.put = uniphier_aio_vol_put,
|
|
.private_value = AUD_HW_IECOUT1,
|
|
},
|
|
};
|
|
|
|
static const struct snd_soc_component_driver uniphier_aio_component = {
|
|
.name = "uniphier-aio",
|
|
.controls = uniphier_aio_controls,
|
|
.num_controls = ARRAY_SIZE(uniphier_aio_controls),
|
|
};
|
|
|
|
int uniphier_aio_probe(struct platform_device *pdev)
|
|
{
|
|
struct uniphier_aio_chip *chip;
|
|
struct device *dev = &pdev->dev;
|
|
int ret, i, j;
|
|
|
|
chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
|
|
if (!chip)
|
|
return -ENOMEM;
|
|
|
|
chip->chip_spec = of_device_get_match_data(dev);
|
|
if (!chip->chip_spec)
|
|
return -EINVAL;
|
|
|
|
chip->regmap_sg = syscon_regmap_lookup_by_phandle(dev->of_node,
|
|
"socionext,syscon");
|
|
if (IS_ERR(chip->regmap_sg)) {
|
|
if (PTR_ERR(chip->regmap_sg) == -EPROBE_DEFER)
|
|
return -EPROBE_DEFER;
|
|
chip->regmap_sg = NULL;
|
|
}
|
|
|
|
chip->clk = devm_clk_get(dev, "aio");
|
|
if (IS_ERR(chip->clk))
|
|
return PTR_ERR(chip->clk);
|
|
|
|
chip->rst = devm_reset_control_get_shared(dev, "aio");
|
|
if (IS_ERR(chip->rst))
|
|
return PTR_ERR(chip->rst);
|
|
|
|
chip->num_aios = chip->chip_spec->num_dais;
|
|
chip->num_wup_aios = chip->num_aios;
|
|
chip->aios = devm_kcalloc(dev,
|
|
chip->num_aios, sizeof(struct uniphier_aio),
|
|
GFP_KERNEL);
|
|
if (!chip->aios)
|
|
return -ENOMEM;
|
|
|
|
chip->num_plls = chip->chip_spec->num_plls;
|
|
chip->plls = devm_kcalloc(dev,
|
|
chip->num_plls,
|
|
sizeof(struct uniphier_aio_pll),
|
|
GFP_KERNEL);
|
|
if (!chip->plls)
|
|
return -ENOMEM;
|
|
memcpy(chip->plls, chip->chip_spec->plls,
|
|
sizeof(struct uniphier_aio_pll) * chip->num_plls);
|
|
|
|
for (i = 0; i < chip->num_aios; i++) {
|
|
struct uniphier_aio *aio = &chip->aios[i];
|
|
|
|
aio->chip = chip;
|
|
aio->fmt = SND_SOC_DAIFMT_I2S;
|
|
|
|
for (j = 0; j < ARRAY_SIZE(aio->sub); j++) {
|
|
struct uniphier_aio_sub *sub = &aio->sub[j];
|
|
|
|
sub->aio = aio;
|
|
spin_lock_init(&sub->lock);
|
|
}
|
|
}
|
|
|
|
chip->pdev = pdev;
|
|
platform_set_drvdata(pdev, chip);
|
|
|
|
ret = clk_prepare_enable(chip->clk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = reset_control_deassert(chip->rst);
|
|
if (ret)
|
|
goto err_out_clock;
|
|
|
|
ret = devm_snd_soc_register_component(dev, &uniphier_aio_component,
|
|
chip->chip_spec->dais,
|
|
chip->chip_spec->num_dais);
|
|
if (ret) {
|
|
dev_err(dev, "Register component failed.\n");
|
|
goto err_out_reset;
|
|
}
|
|
|
|
ret = uniphier_aiodma_soc_register_platform(pdev);
|
|
if (ret) {
|
|
dev_err(dev, "Register platform failed.\n");
|
|
goto err_out_reset;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_out_reset:
|
|
reset_control_assert(chip->rst);
|
|
|
|
err_out_clock:
|
|
clk_disable_unprepare(chip->clk);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(uniphier_aio_probe);
|
|
|
|
int uniphier_aio_remove(struct platform_device *pdev)
|
|
{
|
|
struct uniphier_aio_chip *chip = platform_get_drvdata(pdev);
|
|
|
|
reset_control_assert(chip->rst);
|
|
clk_disable_unprepare(chip->clk);
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(uniphier_aio_remove);
|
|
|
|
MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
|
|
MODULE_DESCRIPTION("UniPhier AIO CPU DAI driver.");
|
|
MODULE_LICENSE("GPL v2");
|