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385d2ae0a1
There should be no need to disable SMEP anymore. Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Lai Jiangshan <jiangshanlai@gmail.com> Reviewed-by: Kees Cook <keescook@chromium.org> Link: https://lore.kernel.org/r/20220127115626.14179-5-bp@alien8.de
155 lines
7.8 KiB
ReStructuredText
155 lines
7.8 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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=================
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x86 Feature Flags
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=================
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Introduction
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============
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On x86, flags appearing in /proc/cpuinfo have an X86_FEATURE definition
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in arch/x86/include/asm/cpufeatures.h. If the kernel cares about a feature
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or KVM want to expose the feature to a KVM guest, it can and should have
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an X86_FEATURE_* defined. These flags represent hardware features as
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well as software features.
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If users want to know if a feature is available on a given system, they
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try to find the flag in /proc/cpuinfo. If a given flag is present, it
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means that the kernel supports it and is currently making it available.
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If such flag represents a hardware feature, it also means that the
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hardware supports it.
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If the expected flag does not appear in /proc/cpuinfo, things are murkier.
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Users need to find out the reason why the flag is missing and find the way
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how to enable it, which is not always easy. There are several factors that
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can explain missing flags: the expected feature failed to enable, the feature
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is missing in hardware, platform firmware did not enable it, the feature is
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disabled at build or run time, an old kernel is in use, or the kernel does
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not support the feature and thus has not enabled it. In general, /proc/cpuinfo
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shows features which the kernel supports. For a full list of CPUID flags
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which the CPU supports, use tools/arch/x86/kcpuid.
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How are feature flags created?
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==============================
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a: Feature flags can be derived from the contents of CPUID leaves.
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------------------------------------------------------------------
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These feature definitions are organized mirroring the layout of CPUID
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leaves and grouped in words with offsets as mapped in enum cpuid_leafs
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in cpufeatures.h (see arch/x86/include/asm/cpufeatures.h for details).
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If a feature is defined with a X86_FEATURE_<name> definition in
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cpufeatures.h, and if it is detected at run time, the flags will be
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displayed accordingly in /proc/cpuinfo. For example, the flag "avx2"
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comes from X86_FEATURE_AVX2 in cpufeatures.h.
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b: Flags can be from scattered CPUID-based features.
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----------------------------------------------------
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Hardware features enumerated in sparsely populated CPUID leaves get
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software-defined values. Still, CPUID needs to be queried to determine
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if a given feature is present. This is done in init_scattered_cpuid_features().
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For instance, X86_FEATURE_CQM_LLC is defined as 11*32 + 0 and its presence is
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checked at runtime in the respective CPUID leaf [EAX=f, ECX=0] bit EDX[1].
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The intent of scattering CPUID leaves is to not bloat struct
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cpuinfo_x86.x86_capability[] unnecessarily. For instance, the CPUID leaf
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[EAX=7, ECX=0] has 30 features and is dense, but the CPUID leaf [EAX=7, EAX=1]
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has only one feature and would waste 31 bits of space in the x86_capability[]
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array. Since there is a struct cpuinfo_x86 for each possible CPU, the wasted
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memory is not trivial.
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c: Flags can be created synthetically under certain conditions for hardware features.
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-------------------------------------------------------------------------------------
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Examples of conditions include whether certain features are present in
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MSR_IA32_CORE_CAPS or specific CPU models are identified. If the needed
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conditions are met, the features are enabled by the set_cpu_cap or
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setup_force_cpu_cap macros. For example, if bit 5 is set in MSR_IA32_CORE_CAPS,
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the feature X86_FEATURE_SPLIT_LOCK_DETECT will be enabled and
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"split_lock_detect" will be displayed. The flag "ring3mwait" will be
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displayed only when running on INTEL_FAM6_XEON_PHI_[KNL|KNM] processors.
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d: Flags can represent purely software features.
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------------------------------------------------
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These flags do not represent hardware features. Instead, they represent a
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software feature implemented in the kernel. For example, Kernel Page Table
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Isolation is purely software feature and its feature flag X86_FEATURE_PTI is
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also defined in cpufeatures.h.
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Naming of Flags
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===============
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The script arch/x86/kernel/cpu/mkcapflags.sh processes the
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#define X86_FEATURE_<name> from cpufeatures.h and generates the
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x86_cap/bug_flags[] arrays in kernel/cpu/capflags.c. The names in the
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resulting x86_cap/bug_flags[] are used to populate /proc/cpuinfo. The naming
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of flags in the x86_cap/bug_flags[] are as follows:
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a: The name of the flag is from the string in X86_FEATURE_<name> by default.
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----------------------------------------------------------------------------
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By default, the flag <name> in /proc/cpuinfo is extracted from the respective
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X86_FEATURE_<name> in cpufeatures.h. For example, the flag "avx2" is from
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X86_FEATURE_AVX2.
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b: The naming can be overridden.
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--------------------------------
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If the comment on the line for the #define X86_FEATURE_* starts with a
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double-quote character (""), the string inside the double-quote characters
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will be the name of the flags. For example, the flag "sse4_1" comes from
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the comment "sse4_1" following the X86_FEATURE_XMM4_1 definition.
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There are situations in which overriding the displayed name of the flag is
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needed. For instance, /proc/cpuinfo is a userspace interface and must remain
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constant. If, for some reason, the naming of X86_FEATURE_<name> changes, one
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shall override the new naming with the name already used in /proc/cpuinfo.
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c: The naming override can be "", which means it will not appear in /proc/cpuinfo.
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----------------------------------------------------------------------------------
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The feature shall be omitted from /proc/cpuinfo if it does not make sense for
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the feature to be exposed to userspace. For example, X86_FEATURE_ALWAYS is
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defined in cpufeatures.h but that flag is an internal kernel feature used
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in the alternative runtime patching functionality. So, its name is overridden
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with "". Its flag will not appear in /proc/cpuinfo.
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Flags are missing when one or more of these happen
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==================================================
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a: The hardware does not enumerate support for it.
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--------------------------------------------------
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For example, when a new kernel is running on old hardware or the feature is
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not enabled by boot firmware. Even if the hardware is new, there might be a
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problem enabling the feature at run time, the flag will not be displayed.
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b: The kernel does not know about the flag.
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-------------------------------------------
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For example, when an old kernel is running on new hardware.
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c: The kernel disabled support for it at compile-time.
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------------------------------------------------------
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For example, if 5-level-paging is not enabled when building (i.e.,
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CONFIG_X86_5LEVEL is not selected) the flag "la57" will not show up [#f1]_.
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Even though the feature will still be detected via CPUID, the kernel disables
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it by clearing via setup_clear_cpu_cap(X86_FEATURE_LA57).
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d: The feature is disabled at boot-time.
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----------------------------------------
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A feature can be disabled either using a command-line parameter or because
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it failed to be enabled. The command-line parameter clearcpuid= can be used
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to disable features using the feature number as defined in
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/arch/x86/include/asm/cpufeatures.h. For instance, User Mode Instruction
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Protection can be disabled using clearcpuid=514. The number 514 is calculated
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from #define X86_FEATURE_UMIP (16*32 + 2).
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In addition, there exists a variety of custom command-line parameters that
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disable specific features. The list of parameters includes, but is not limited
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to, nofsgsbase, nosgx, noxsave, etc. 5-level paging can also be disabled using
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"no5lvl".
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e: The feature was known to be non-functional.
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----------------------------------------------
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The feature was known to be non-functional because a dependency was
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missing at runtime. For example, AVX flags will not show up if XSAVE feature
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is disabled since they depend on XSAVE feature. Another example would be broken
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CPUs and them missing microcode patches. Due to that, the kernel decides not to
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enable a feature.
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.. [#f1] 5-level paging uses linear address of 57 bits.
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