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dcbac73a5b
Now that the P7/8 path no longer supports radix, real-mode handlers
do not need to deal with being called in virt mode.
This change effectively reverts commit acde25726b
("KVM: PPC: Book3S
HV: Add radix checks in real-mode hypercall handlers").
It removes a few more real-mode tests in rm hcall handlers, which
allows the indirect ops for the xive module to be removed from the
built-in xics rm handlers.
kvmppc_h_random is renamed to kvmppc_rm_h_random to be a bit more
descriptive and consistent with other rm handlers.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210528090752.3542186-25-npiggin@gmail.com
670 lines
17 KiB
C
670 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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*
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* Copyright 2010 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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* Copyright 2011 David Gibson, IBM Corporation <dwg@au1.ibm.com>
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* Copyright 2016 Alexey Kardashevskiy, IBM Corporation <aik@au1.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <linux/gfp.h>
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#include <linux/slab.h>
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#include <linux/hugetlb.h>
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#include <linux/list.h>
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#include <linux/stringify.h>
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#include <asm/kvm_ppc.h>
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#include <asm/kvm_book3s.h>
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#include <asm/book3s/64/mmu-hash.h>
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#include <asm/mmu_context.h>
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#include <asm/hvcall.h>
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#include <asm/synch.h>
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#include <asm/ppc-opcode.h>
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#include <asm/udbg.h>
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#include <asm/iommu.h>
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#include <asm/tce.h>
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#include <asm/pte-walk.h>
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#ifdef CONFIG_BUG
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#define WARN_ON_ONCE_RM(condition) ({ \
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static bool __section(".data.unlikely") __warned; \
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int __ret_warn_once = !!(condition); \
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\
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if (unlikely(__ret_warn_once && !__warned)) { \
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__warned = true; \
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pr_err("WARN_ON_ONCE_RM: (%s) at %s:%u\n", \
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__stringify(condition), \
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__func__, __LINE__); \
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dump_stack(); \
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} \
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unlikely(__ret_warn_once); \
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})
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#else
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#define WARN_ON_ONCE_RM(condition) ({ \
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int __ret_warn_on = !!(condition); \
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unlikely(__ret_warn_on); \
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})
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#endif
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/*
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* Finds a TCE table descriptor by LIOBN.
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*
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* WARNING: This will be called in real or virtual mode on HV KVM and virtual
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* mode on PR KVM
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*/
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struct kvmppc_spapr_tce_table *kvmppc_find_table(struct kvm *kvm,
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unsigned long liobn)
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{
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struct kvmppc_spapr_tce_table *stt;
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list_for_each_entry_lockless(stt, &kvm->arch.spapr_tce_tables, list)
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if (stt->liobn == liobn)
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return stt;
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return NULL;
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}
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EXPORT_SYMBOL_GPL(kvmppc_find_table);
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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static long kvmppc_rm_tce_to_ua(struct kvm *kvm,
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unsigned long tce, unsigned long *ua)
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{
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unsigned long gfn = tce >> PAGE_SHIFT;
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struct kvm_memory_slot *memslot;
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memslot = search_memslots(kvm_memslots_raw(kvm), gfn);
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if (!memslot)
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return -EINVAL;
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*ua = __gfn_to_hva_memslot(memslot, gfn) |
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(tce & ~(PAGE_MASK | TCE_PCI_READ | TCE_PCI_WRITE));
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return 0;
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}
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/*
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* Validates TCE address.
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* At the moment flags and page mask are validated.
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* As the host kernel does not access those addresses (just puts them
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* to the table and user space is supposed to process them), we can skip
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* checking other things (such as TCE is a guest RAM address or the page
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* was actually allocated).
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*/
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static long kvmppc_rm_tce_validate(struct kvmppc_spapr_tce_table *stt,
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unsigned long tce)
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{
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unsigned long gpa = tce & ~(TCE_PCI_READ | TCE_PCI_WRITE);
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enum dma_data_direction dir = iommu_tce_direction(tce);
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struct kvmppc_spapr_tce_iommu_table *stit;
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unsigned long ua = 0;
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/* Allow userspace to poison TCE table */
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if (dir == DMA_NONE)
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return H_SUCCESS;
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if (iommu_tce_check_gpa(stt->page_shift, gpa))
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return H_PARAMETER;
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if (kvmppc_rm_tce_to_ua(stt->kvm, tce, &ua))
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return H_TOO_HARD;
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list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
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unsigned long hpa = 0;
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struct mm_iommu_table_group_mem_t *mem;
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long shift = stit->tbl->it_page_shift;
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mem = mm_iommu_lookup_rm(stt->kvm->mm, ua, 1ULL << shift);
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if (!mem)
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return H_TOO_HARD;
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if (mm_iommu_ua_to_hpa_rm(mem, ua, shift, &hpa))
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return H_TOO_HARD;
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}
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return H_SUCCESS;
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}
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/* Note on the use of page_address() in real mode,
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*
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* It is safe to use page_address() in real mode on ppc64 because
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* page_address() is always defined as lowmem_page_address()
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* which returns __va(PFN_PHYS(page_to_pfn(page))) which is arithmetic
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* operation and does not access page struct.
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*
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* Theoretically page_address() could be defined different
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* but either WANT_PAGE_VIRTUAL or HASHED_PAGE_VIRTUAL
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* would have to be enabled.
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* WANT_PAGE_VIRTUAL is never enabled on ppc32/ppc64,
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* HASHED_PAGE_VIRTUAL could be enabled for ppc32 only and only
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* if CONFIG_HIGHMEM is defined. As CONFIG_SPARSEMEM_VMEMMAP
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* is not expected to be enabled on ppc32, page_address()
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* is safe for ppc32 as well.
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*
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* WARNING: This will be called in real-mode on HV KVM and virtual
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* mode on PR KVM
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*/
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static u64 *kvmppc_page_address(struct page *page)
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{
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#if defined(HASHED_PAGE_VIRTUAL) || defined(WANT_PAGE_VIRTUAL)
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#error TODO: fix to avoid page_address() here
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#endif
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return (u64 *) page_address(page);
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}
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/*
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* Handles TCE requests for emulated devices.
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* Puts guest TCE values to the table and expects user space to convert them.
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* Cannot fail so kvmppc_rm_tce_validate must be called before it.
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*/
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static void kvmppc_rm_tce_put(struct kvmppc_spapr_tce_table *stt,
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unsigned long idx, unsigned long tce)
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{
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struct page *page;
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u64 *tbl;
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idx -= stt->offset;
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page = stt->pages[idx / TCES_PER_PAGE];
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/*
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* page must not be NULL in real mode,
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* kvmppc_rm_ioba_validate() must have taken care of this.
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*/
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WARN_ON_ONCE_RM(!page);
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tbl = kvmppc_page_address(page);
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tbl[idx % TCES_PER_PAGE] = tce;
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}
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/*
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* TCEs pages are allocated in kvmppc_rm_tce_put() which won't be able to do so
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* in real mode.
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* Check if kvmppc_rm_tce_put() can succeed in real mode, i.e. a TCEs page is
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* allocated or not required (when clearing a tce entry).
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*/
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static long kvmppc_rm_ioba_validate(struct kvmppc_spapr_tce_table *stt,
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unsigned long ioba, unsigned long npages, bool clearing)
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{
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unsigned long i, idx, sttpage, sttpages;
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unsigned long ret = kvmppc_ioba_validate(stt, ioba, npages);
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if (ret)
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return ret;
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/*
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* clearing==true says kvmppc_rm_tce_put won't be allocating pages
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* for empty tces.
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*/
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if (clearing)
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return H_SUCCESS;
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idx = (ioba >> stt->page_shift) - stt->offset;
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sttpage = idx / TCES_PER_PAGE;
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sttpages = ALIGN(idx % TCES_PER_PAGE + npages, TCES_PER_PAGE) /
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TCES_PER_PAGE;
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for (i = sttpage; i < sttpage + sttpages; ++i)
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if (!stt->pages[i])
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return H_TOO_HARD;
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return H_SUCCESS;
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}
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static long iommu_tce_xchg_no_kill_rm(struct mm_struct *mm,
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struct iommu_table *tbl,
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unsigned long entry, unsigned long *hpa,
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enum dma_data_direction *direction)
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{
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long ret;
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ret = tbl->it_ops->xchg_no_kill(tbl, entry, hpa, direction, true);
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if (!ret && ((*direction == DMA_FROM_DEVICE) ||
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(*direction == DMA_BIDIRECTIONAL))) {
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__be64 *pua = IOMMU_TABLE_USERSPACE_ENTRY_RO(tbl, entry);
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/*
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* kvmppc_rm_tce_iommu_do_map() updates the UA cache after
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* calling this so we still get here a valid UA.
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*/
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if (pua && *pua)
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mm_iommu_ua_mark_dirty_rm(mm, be64_to_cpu(*pua));
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}
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return ret;
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}
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static void iommu_tce_kill_rm(struct iommu_table *tbl,
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unsigned long entry, unsigned long pages)
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{
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if (tbl->it_ops->tce_kill)
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tbl->it_ops->tce_kill(tbl, entry, pages, true);
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}
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static void kvmppc_rm_clear_tce(struct kvm *kvm, struct iommu_table *tbl,
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unsigned long entry)
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{
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unsigned long hpa = 0;
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enum dma_data_direction dir = DMA_NONE;
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iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, entry, &hpa, &dir);
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}
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static long kvmppc_rm_tce_iommu_mapped_dec(struct kvm *kvm,
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struct iommu_table *tbl, unsigned long entry)
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{
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struct mm_iommu_table_group_mem_t *mem = NULL;
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const unsigned long pgsize = 1ULL << tbl->it_page_shift;
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__be64 *pua = IOMMU_TABLE_USERSPACE_ENTRY_RO(tbl, entry);
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if (!pua)
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/* it_userspace allocation might be delayed */
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return H_TOO_HARD;
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mem = mm_iommu_lookup_rm(kvm->mm, be64_to_cpu(*pua), pgsize);
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if (!mem)
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return H_TOO_HARD;
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mm_iommu_mapped_dec(mem);
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*pua = cpu_to_be64(0);
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return H_SUCCESS;
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}
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static long kvmppc_rm_tce_iommu_do_unmap(struct kvm *kvm,
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struct iommu_table *tbl, unsigned long entry)
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{
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enum dma_data_direction dir = DMA_NONE;
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unsigned long hpa = 0;
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long ret;
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if (iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, entry, &hpa, &dir))
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/*
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* real mode xchg can fail if struct page crosses
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* a page boundary
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*/
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return H_TOO_HARD;
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if (dir == DMA_NONE)
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return H_SUCCESS;
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ret = kvmppc_rm_tce_iommu_mapped_dec(kvm, tbl, entry);
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if (ret)
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iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, entry, &hpa, &dir);
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return ret;
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}
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static long kvmppc_rm_tce_iommu_unmap(struct kvm *kvm,
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struct kvmppc_spapr_tce_table *stt, struct iommu_table *tbl,
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unsigned long entry)
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{
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unsigned long i, ret = H_SUCCESS;
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unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift);
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unsigned long io_entry = entry * subpages;
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for (i = 0; i < subpages; ++i) {
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ret = kvmppc_rm_tce_iommu_do_unmap(kvm, tbl, io_entry + i);
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if (ret != H_SUCCESS)
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break;
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}
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return ret;
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}
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static long kvmppc_rm_tce_iommu_do_map(struct kvm *kvm, struct iommu_table *tbl,
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unsigned long entry, unsigned long ua,
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enum dma_data_direction dir)
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{
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long ret;
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unsigned long hpa = 0;
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__be64 *pua = IOMMU_TABLE_USERSPACE_ENTRY_RO(tbl, entry);
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struct mm_iommu_table_group_mem_t *mem;
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if (!pua)
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/* it_userspace allocation might be delayed */
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return H_TOO_HARD;
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mem = mm_iommu_lookup_rm(kvm->mm, ua, 1ULL << tbl->it_page_shift);
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if (!mem)
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return H_TOO_HARD;
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if (WARN_ON_ONCE_RM(mm_iommu_ua_to_hpa_rm(mem, ua, tbl->it_page_shift,
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&hpa)))
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return H_TOO_HARD;
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if (WARN_ON_ONCE_RM(mm_iommu_mapped_inc(mem)))
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return H_TOO_HARD;
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ret = iommu_tce_xchg_no_kill_rm(kvm->mm, tbl, entry, &hpa, &dir);
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if (ret) {
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mm_iommu_mapped_dec(mem);
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/*
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* real mode xchg can fail if struct page crosses
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* a page boundary
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*/
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return H_TOO_HARD;
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}
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if (dir != DMA_NONE)
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kvmppc_rm_tce_iommu_mapped_dec(kvm, tbl, entry);
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*pua = cpu_to_be64(ua);
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return 0;
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}
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static long kvmppc_rm_tce_iommu_map(struct kvm *kvm,
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struct kvmppc_spapr_tce_table *stt, struct iommu_table *tbl,
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unsigned long entry, unsigned long ua,
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enum dma_data_direction dir)
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{
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unsigned long i, pgoff, ret = H_SUCCESS;
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unsigned long subpages = 1ULL << (stt->page_shift - tbl->it_page_shift);
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unsigned long io_entry = entry * subpages;
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for (i = 0, pgoff = 0; i < subpages;
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++i, pgoff += IOMMU_PAGE_SIZE(tbl)) {
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ret = kvmppc_rm_tce_iommu_do_map(kvm, tbl,
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io_entry + i, ua + pgoff, dir);
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if (ret != H_SUCCESS)
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break;
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}
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return ret;
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}
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long kvmppc_rm_h_put_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
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unsigned long ioba, unsigned long tce)
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{
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struct kvmppc_spapr_tce_table *stt;
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long ret;
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struct kvmppc_spapr_tce_iommu_table *stit;
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unsigned long entry, ua = 0;
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enum dma_data_direction dir;
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/* udbg_printf("H_PUT_TCE(): liobn=0x%lx ioba=0x%lx, tce=0x%lx\n", */
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/* liobn, ioba, tce); */
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stt = kvmppc_find_table(vcpu->kvm, liobn);
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if (!stt)
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return H_TOO_HARD;
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ret = kvmppc_rm_ioba_validate(stt, ioba, 1, tce == 0);
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if (ret != H_SUCCESS)
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return ret;
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ret = kvmppc_rm_tce_validate(stt, tce);
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if (ret != H_SUCCESS)
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return ret;
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dir = iommu_tce_direction(tce);
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if ((dir != DMA_NONE) && kvmppc_rm_tce_to_ua(vcpu->kvm, tce, &ua))
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return H_PARAMETER;
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entry = ioba >> stt->page_shift;
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list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
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if (dir == DMA_NONE)
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ret = kvmppc_rm_tce_iommu_unmap(vcpu->kvm, stt,
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stit->tbl, entry);
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else
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ret = kvmppc_rm_tce_iommu_map(vcpu->kvm, stt,
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stit->tbl, entry, ua, dir);
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iommu_tce_kill_rm(stit->tbl, entry, 1);
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if (ret != H_SUCCESS) {
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kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
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return ret;
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}
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}
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kvmppc_rm_tce_put(stt, entry, tce);
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return H_SUCCESS;
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}
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static long kvmppc_rm_ua_to_hpa(struct kvm_vcpu *vcpu, unsigned long mmu_seq,
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unsigned long ua, unsigned long *phpa)
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{
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pte_t *ptep, pte;
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unsigned shift = 0;
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/*
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* Called in real mode with MSR_EE = 0. We are safe here.
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* It is ok to do the lookup with arch.pgdir here, because
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* we are doing this on secondary cpus and current task there
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* is not the hypervisor. Also this is safe against THP in the
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* host, because an IPI to primary thread will wait for the secondary
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* to exit which will agains result in the below page table walk
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* to finish.
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*/
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/* an rmap lock won't make it safe. because that just ensure hash
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* page table entries are removed with rmap lock held. After that
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* mmu notifier returns and we go ahead and removing ptes from Qemu page table.
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*/
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ptep = find_kvm_host_pte(vcpu->kvm, mmu_seq, ua, &shift);
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if (!ptep)
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return -ENXIO;
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pte = READ_ONCE(*ptep);
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if (!pte_present(pte))
|
|
return -ENXIO;
|
|
|
|
if (!shift)
|
|
shift = PAGE_SHIFT;
|
|
|
|
/* Avoid handling anything potentially complicated in realmode */
|
|
if (shift > PAGE_SHIFT)
|
|
return -EAGAIN;
|
|
|
|
if (!pte_young(pte))
|
|
return -EAGAIN;
|
|
|
|
*phpa = (pte_pfn(pte) << PAGE_SHIFT) | (ua & ((1ULL << shift) - 1)) |
|
|
(ua & ~PAGE_MASK);
|
|
|
|
return 0;
|
|
}
|
|
|
|
long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu,
|
|
unsigned long liobn, unsigned long ioba,
|
|
unsigned long tce_list, unsigned long npages)
|
|
{
|
|
struct kvm *kvm = vcpu->kvm;
|
|
struct kvmppc_spapr_tce_table *stt;
|
|
long i, ret = H_SUCCESS;
|
|
unsigned long tces, entry, ua = 0;
|
|
unsigned long mmu_seq;
|
|
bool prereg = false;
|
|
struct kvmppc_spapr_tce_iommu_table *stit;
|
|
|
|
/*
|
|
* used to check for invalidations in progress
|
|
*/
|
|
mmu_seq = kvm->mmu_notifier_seq;
|
|
smp_rmb();
|
|
|
|
stt = kvmppc_find_table(vcpu->kvm, liobn);
|
|
if (!stt)
|
|
return H_TOO_HARD;
|
|
|
|
entry = ioba >> stt->page_shift;
|
|
/*
|
|
* The spec says that the maximum size of the list is 512 TCEs
|
|
* so the whole table addressed resides in 4K page
|
|
*/
|
|
if (npages > 512)
|
|
return H_PARAMETER;
|
|
|
|
if (tce_list & (SZ_4K - 1))
|
|
return H_PARAMETER;
|
|
|
|
ret = kvmppc_rm_ioba_validate(stt, ioba, npages, false);
|
|
if (ret != H_SUCCESS)
|
|
return ret;
|
|
|
|
if (mm_iommu_preregistered(vcpu->kvm->mm)) {
|
|
/*
|
|
* We get here if guest memory was pre-registered which
|
|
* is normally VFIO case and gpa->hpa translation does not
|
|
* depend on hpt.
|
|
*/
|
|
struct mm_iommu_table_group_mem_t *mem;
|
|
|
|
if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce_list, &ua))
|
|
return H_TOO_HARD;
|
|
|
|
mem = mm_iommu_lookup_rm(vcpu->kvm->mm, ua, IOMMU_PAGE_SIZE_4K);
|
|
if (mem)
|
|
prereg = mm_iommu_ua_to_hpa_rm(mem, ua,
|
|
IOMMU_PAGE_SHIFT_4K, &tces) == 0;
|
|
}
|
|
|
|
if (!prereg) {
|
|
/*
|
|
* This is usually a case of a guest with emulated devices only
|
|
* when TCE list is not in preregistered memory.
|
|
* We do not require memory to be preregistered in this case
|
|
* so lock rmap and do __find_linux_pte_or_hugepte().
|
|
*/
|
|
if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce_list, &ua))
|
|
return H_TOO_HARD;
|
|
|
|
arch_spin_lock(&kvm->mmu_lock.rlock.raw_lock);
|
|
if (kvmppc_rm_ua_to_hpa(vcpu, mmu_seq, ua, &tces)) {
|
|
ret = H_TOO_HARD;
|
|
goto unlock_exit;
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < npages; ++i) {
|
|
unsigned long tce = be64_to_cpu(((u64 *)tces)[i]);
|
|
|
|
ret = kvmppc_rm_tce_validate(stt, tce);
|
|
if (ret != H_SUCCESS)
|
|
goto unlock_exit;
|
|
}
|
|
|
|
for (i = 0; i < npages; ++i) {
|
|
unsigned long tce = be64_to_cpu(((u64 *)tces)[i]);
|
|
|
|
ua = 0;
|
|
if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce, &ua)) {
|
|
ret = H_PARAMETER;
|
|
goto invalidate_exit;
|
|
}
|
|
|
|
list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
|
|
ret = kvmppc_rm_tce_iommu_map(vcpu->kvm, stt,
|
|
stit->tbl, entry + i, ua,
|
|
iommu_tce_direction(tce));
|
|
|
|
if (ret != H_SUCCESS) {
|
|
kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl,
|
|
entry);
|
|
goto invalidate_exit;
|
|
}
|
|
}
|
|
|
|
kvmppc_rm_tce_put(stt, entry + i, tce);
|
|
}
|
|
|
|
invalidate_exit:
|
|
list_for_each_entry_lockless(stit, &stt->iommu_tables, next)
|
|
iommu_tce_kill_rm(stit->tbl, entry, npages);
|
|
|
|
unlock_exit:
|
|
if (!prereg)
|
|
arch_spin_unlock(&kvm->mmu_lock.rlock.raw_lock);
|
|
return ret;
|
|
}
|
|
|
|
long kvmppc_rm_h_stuff_tce(struct kvm_vcpu *vcpu,
|
|
unsigned long liobn, unsigned long ioba,
|
|
unsigned long tce_value, unsigned long npages)
|
|
{
|
|
struct kvmppc_spapr_tce_table *stt;
|
|
long i, ret;
|
|
struct kvmppc_spapr_tce_iommu_table *stit;
|
|
|
|
stt = kvmppc_find_table(vcpu->kvm, liobn);
|
|
if (!stt)
|
|
return H_TOO_HARD;
|
|
|
|
ret = kvmppc_rm_ioba_validate(stt, ioba, npages, tce_value == 0);
|
|
if (ret != H_SUCCESS)
|
|
return ret;
|
|
|
|
/* Check permission bits only to allow userspace poison TCE for debug */
|
|
if (tce_value & (TCE_PCI_WRITE | TCE_PCI_READ))
|
|
return H_PARAMETER;
|
|
|
|
list_for_each_entry_lockless(stit, &stt->iommu_tables, next) {
|
|
unsigned long entry = ioba >> stt->page_shift;
|
|
|
|
for (i = 0; i < npages; ++i) {
|
|
ret = kvmppc_rm_tce_iommu_unmap(vcpu->kvm, stt,
|
|
stit->tbl, entry + i);
|
|
|
|
if (ret == H_SUCCESS)
|
|
continue;
|
|
|
|
if (ret == H_TOO_HARD)
|
|
goto invalidate_exit;
|
|
|
|
WARN_ON_ONCE_RM(1);
|
|
kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
|
|
}
|
|
}
|
|
|
|
for (i = 0; i < npages; ++i, ioba += (1ULL << stt->page_shift))
|
|
kvmppc_rm_tce_put(stt, ioba >> stt->page_shift, tce_value);
|
|
|
|
invalidate_exit:
|
|
list_for_each_entry_lockless(stit, &stt->iommu_tables, next)
|
|
iommu_tce_kill_rm(stit->tbl, ioba >> stt->page_shift, npages);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* This can be called in either virtual mode or real mode */
|
|
long kvmppc_h_get_tce(struct kvm_vcpu *vcpu, unsigned long liobn,
|
|
unsigned long ioba)
|
|
{
|
|
struct kvmppc_spapr_tce_table *stt;
|
|
long ret;
|
|
unsigned long idx;
|
|
struct page *page;
|
|
u64 *tbl;
|
|
|
|
stt = kvmppc_find_table(vcpu->kvm, liobn);
|
|
if (!stt)
|
|
return H_TOO_HARD;
|
|
|
|
ret = kvmppc_ioba_validate(stt, ioba, 1);
|
|
if (ret != H_SUCCESS)
|
|
return ret;
|
|
|
|
idx = (ioba >> stt->page_shift) - stt->offset;
|
|
page = stt->pages[idx / TCES_PER_PAGE];
|
|
if (!page) {
|
|
vcpu->arch.regs.gpr[4] = 0;
|
|
return H_SUCCESS;
|
|
}
|
|
tbl = (u64 *)page_address(page);
|
|
|
|
vcpu->arch.regs.gpr[4] = tbl[idx % TCES_PER_PAGE];
|
|
|
|
return H_SUCCESS;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvmppc_h_get_tce);
|
|
|
|
#endif /* KVM_BOOK3S_HV_POSSIBLE */
|