mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-28 05:24:47 +08:00
c19ba9f999
The following devices/functionalities were added: * Main and secondary UARTs. * i2c and the pcf8563 device. * Ethernet. * NAND. * The BP1 button. * The LED. * Watchdog * SD. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
94 lines
2.4 KiB
Plaintext
94 lines
2.4 KiB
Plaintext
/*
|
|
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* as published by the Free Software Foundation; either version 2
|
|
* of the License, or (at your option) any later version.
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program; if not, write to the Free Software
|
|
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
|
* MA 02110-1301, USA.
|
|
*/
|
|
|
|
#include "imx51.dtsi"
|
|
|
|
/ {
|
|
model = "Eukrea CPUIMX51";
|
|
compatible = "eukrea,cpuimx51", "fsl,imx51";
|
|
|
|
memory {
|
|
reg = <0x90000000 0x10000000>; /* 256M */
|
|
};
|
|
};
|
|
|
|
&fec {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_fec>;
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
status = "okay";
|
|
|
|
pcf8563@51 {
|
|
compatible = "nxp,pcf8563";
|
|
reg = <0x51>;
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
imx51-eukrea {
|
|
pinctrl_tsc2007_1: tsc2007grp-1 {
|
|
fsl,pins = <
|
|
MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
|
|
MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
|
|
>;
|
|
};
|
|
|
|
pinctrl_fec: fecgrp {
|
|
fsl,pins = <
|
|
MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
|
|
MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
|
|
MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
|
|
MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
|
|
MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
|
|
MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
|
|
MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
|
|
MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
|
|
MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
|
|
MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
|
|
MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
|
|
MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
|
|
MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
|
|
MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
|
|
MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
|
|
MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
|
|
MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
|
|
MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX51_PAD_SD2_CMD__I2C1_SCL 0x400001ed
|
|
MX51_PAD_SD2_CLK__I2C1_SDA 0x400001ed
|
|
>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&nfc {
|
|
nand-bus-width = <8>;
|
|
nand-ecc-mode = "hw";
|
|
nand-on-flash-bbt;
|
|
status = "okay";
|
|
};
|