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35e372a3a1
This patch enables touchscreen support on bcm958300k and bcm958305k. Touchscreen is connected to these boards through the bcm9hmidc daughter card, and therefore also adding bcm9hmidc.dtsi that describes the daughter card Signed-off-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
272 lines
7.0 KiB
Plaintext
272 lines
7.0 KiB
Plaintext
/*
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* BSD LICENSE
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*
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* Copyright(c) 2014 Broadcom Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/bcm-cygnus.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,cygnus";
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model = "Broadcom Cygnus SoC";
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interrupt-parent = <&gic>;
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aliases {
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serial0 = &uart3;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a9";
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next-level-cache = <&L2>;
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reg = <0x0>;
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};
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};
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/include/ "bcm-cygnus-clock.dtsi"
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core {
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compatible = "simple-bus";
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ranges = <0x00000000 0x19000000 0x1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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timer@20200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x20200 0x100>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&periph_clk>;
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};
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gic: interrupt-controller@21000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x21000 0x1000>,
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<0x20100 0x100>;
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};
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L2: l2-cache {
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compatible = "arm,pl310-cache";
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reg = <0x22000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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};
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axi {
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compatible = "simple-bus";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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pinctrl: pinctrl@0x0301d0c8 {
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compatible = "brcm,cygnus-pinmux";
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reg = <0x0301d0c8 0x30>,
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<0x0301d24c 0x2c>;
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};
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gpio_crmu: gpio@03024800 {
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compatible = "brcm,cygnus-crmu-gpio";
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reg = <0x03024800 0x50>,
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<0x03024008 0x18>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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i2c0: i2c@18008000 {
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compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
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reg = <0x18008000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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wdt0: wdt@18009000 {
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compatible = "arm,sp805" , "arm,primecell";
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reg = <0x18009000 0x1000>;
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&axi81_clk>;
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clock-names = "apb_pclk";
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};
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gpio_ccm: gpio@1800a000 {
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compatible = "brcm,cygnus-ccm-gpio";
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reg = <0x1800a000 0x50>,
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<0x0301d164 0x20>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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};
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i2c1: i2c@1800b000 {
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compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
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reg = <0x1800b000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
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clock-frequency = <100000>;
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status = "disabled";
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};
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pcie0: pcie@18012000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18012000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x28000000 0 0x00010000
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0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
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status = "disabled";
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};
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pcie1: pcie@18013000 {
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compatible = "brcm,iproc-pcie";
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reg = <0x18013000 0x1000>;
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
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linux,pci-domain = <1>;
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bus-range = <0x00 0xff>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x81000000 0 0 0x48000000 0 0x00010000
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0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
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status = "disabled";
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};
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uart0: serial@18020000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x18020000 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&axi81_clk>;
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clock-frequency = <100000000>;
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status = "disabled";
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};
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uart1: serial@18021000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x18021000 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&axi81_clk>;
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clock-frequency = <100000000>;
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status = "disabled";
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};
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uart2: serial@18022000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x18020000 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&axi81_clk>;
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clock-frequency = <100000000>;
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status = "disabled";
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};
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uart3: serial@18023000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x18023000 0x100>;
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reg-shift = <2>;
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reg-io-width = <4>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&axi81_clk>;
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clock-frequency = <100000000>;
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status = "disabled";
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};
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nand: nand@18046000 {
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compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1",
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"brcm,brcmnand";
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reg = <0x18046000 0x600>, <0xf8105408 0x600>,
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<0x18046f00 0x20>;
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reg-names = "nand", "iproc-idm", "iproc-ext";
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interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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brcm,nand-has-wp;
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};
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gpio_asiu: gpio@180a5000 {
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compatible = "brcm,cygnus-asiu-gpio";
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reg = <0x180a5000 0x668>;
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#gpio-cells = <2>;
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gpio-controller;
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pinmux = <&pinctrl>;
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interrupt-controller;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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};
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touchscreen: tsc@180a6000 {
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compatible = "brcm,iproc-touchscreen";
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reg = <0x180a6000 0x40>;
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clocks = <&asiu_clks BCM_CYGNUS_ASIU_ADC_CLK>;
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clock-names = "tsc_clk";
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interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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};
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};
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