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At the moment FPGA manager core loads to the device entire image
provided to fpga_mgr_load(). But it is not always whole FPGA image
buffer meant to be written to the device. In particular, .dat formatted
image for Microchip MPF contains meta info in the header that is not
meant to be written to the device. This is issue for those low level
drivers that loads data to the device with write() fpga_manager_ops
callback, since write() can be called in iterator over scatter-gather
table, not only linear image buffer. On the other hand, write_sg()
callback is provided with whole image in scatter-gather form and can
decide itself which part should be sent to the device.
Add header_size and data_size to the fpga_image_info struct, add
skip_header to the fpga_manager_ops struct and adjust fpga_mgr_write()
callers with respect to them.
* info->header_size indicates part at the beginning of image buffer
that contains some meta info. It is optional and can be 0,
initialized with mops->initial_header_size.
* mops->skip_header tells fpga-mgr core whether write should start
from the beginning of image buffer or at the offset of header_size.
* info->data_size is the size of bitstream data that is meant to be
written to the device. It is also optional and can be 0, which
means bitstream data is up to the end of image buffer.
Also add parse_header() callback to fpga_manager_ops, which purpose is
to set info->header_size and info->data_size. At least
initial_header_size bytes of image buffer will be passed into
parse_header() first time. If it is not enough, parse_header() should
set desired size into info->header_size and return -EAGAIN, then it will
be called again with greater part of image buffer on the input.
Suggested-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20220623163248.3672-2-i.bornyakov@metrotek.ru
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
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| .. | ||
| adi-axi-common.h | ||
| altera-pr-ip-core.h | ||
| fpga-bridge.h | ||
| fpga-mgr.h | ||
| fpga-region.h | ||