Linus Torvalds 356a1adca8 arm64 updates for 5.18 ... - Support for including MTE tags in ELF coredumps - Instruction encoder updates, including fixes to 64-bit immediate generation and support for the LSE atomic instructions - Improvements to kselftests for MTE and fpsimd - Symbol aliasing and linker script cleanups - Reduce instruction cache maintenance performed for user mappings created using contiguous PTEs - Support for the new "asymmetric" MTE mode, where stores are checked asynchronously but loads are checked synchronously - Support for the latest pointer authentication algorithm ("QARMA3") - Support for the DDR PMU present in the Marvell CN10K platform - Support for the CPU PMU present in the Apple M1 platform - Use the RNDR instruction for arch_get_random_{int,long}() - Update our copy of the Arm optimised string routines for str{n}cmp() - Fix signal frame generation for CPUs which have foolishly elected to avoid building in support for the fpsimd instructions - Workaround for Marvell GICv3 erratum #38545 - Clarification to our Documentation (booting reqs. and MTE prctl()) - Miscellanous cleanups and minor fixes -----BEGIN PGP SIGNATURE----- iQFEBAABCgAuFiEEPxTL6PPUbjXGY88ct6xw3ITBYzQFAmIvta8QHHdpbGxAa2Vy bmVsLm9yZwAKCRC3rHDchMFjNAIhB/oDSva5FryAFExVuIB+mqRkbZO9kj6fy/5J ctN9LEVO2GI/U1TVAUWop1lXmP8Kbq5UCZOAuY8sz7dAZs7NRUWkwTrXVhaTpi6L oxCfu5Afu76d/TGgivNz+G7/ewIJRFj5zCPmHezLF9iiWPUkcAsP0XCp4a0iOjU4 04O4d7TL/ap9ujEes+U0oEXHnyDTPrVB2OVE316FKD1fgztcjVJ2U+TxX5O4xitT PPIfeQCjQBq1B2OC1cptE3wpP+YEr9OZJbx+Ieweidy1CSInEy0nZ13tLoUnGPGU KPhsvO9daUCbhbd5IDRBuXmTi/sHU4NIB8LNEVzT1mUPnU8pCizv =ziGg -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Will Deacon: - Support for including MTE tags in ELF coredumps - Instruction encoder updates, including fixes to 64-bit immediate generation and support for the LSE atomic instructions - Improvements to kselftests for MTE and fpsimd - Symbol aliasing and linker script cleanups - Reduce instruction cache maintenance performed for user mappings created using contiguous PTEs - Support for the new "asymmetric" MTE mode, where stores are checked asynchronously but loads are checked synchronously - Support for the latest pointer authentication algorithm ("QARMA3") - Support for the DDR PMU present in the Marvell CN10K platform - Support for the CPU PMU present in the Apple M1 platform - Use the RNDR instruction for arch_get_random_{int,long}() - Update our copy of the Arm optimised string routines for str{n}cmp() - Fix signal frame generation for CPUs which have foolishly elected to avoid building in support for the fpsimd instructions - Workaround for Marvell GICv3 erratum #38545 - Clarification to our Documentation (booting reqs. and MTE prctl()) - Miscellanous cleanups and minor fixes * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (90 commits) docs: sysfs-devices-system-cpu: document "asymm" value for mte_tcf_preferred arm64/mte: Remove asymmetric mode from the prctl() interface arm64: Add cavium_erratum_23154_cpus missing sentinel perf/marvell: Fix !CONFIG_OF build for CN10K DDR PMU driver arm64: mm: Drop 'const' from conditional arm64_dma_phys_limit definition Documentation: vmcoreinfo: Fix htmldocs warning kasan: fix a missing header include of static_keys.h drivers/perf: Add Apple icestorm/firestorm CPU PMU driver drivers/perf: arm_pmu: Handle 47 bit counters arm64: perf: Consistently make all event numbers as 16-bits arm64: perf: Expose some Armv9 common events under sysfs perf/marvell: cn10k DDR perf event core ownership perf/marvell: cn10k DDR perfmon event overflow handling perf/marvell: CN10k DDR performance monitor support dt-bindings: perf: marvell: cn10k ddr performance monitor arm64: clean up tools Makefile perf/arm-cmn: Update watchpoint format perf/arm-cmn: Hide XP PUB events for CMN-600 arm64: drop unused includes of <linux/personality.h> arm64: Do not defer reserve_crashkernel() for platforms with no DMA memory zones ...		2022-03-21 10:46:39 -07:00
..
alpha/include	tools headers uapi: Sync asm-generic/mman-common.h and linux/mman.h	2019-03-28 14:31:56 -03:00
arc/include/uapi/asm	tools arch uapi: Copy missing unistd.h headers for arc, hexagon and riscv	2019-05-02 16:00:20 -04:00
arm/include	tools headers kvm: Sync kvm headers with the kernel sources	2019-12-02 12:54:13 -03:00
arm64/include	tools kvm headers arm64: Update KVM headers from the kernel sources	2022-03-12 10:33:13 -03:00
csky/include/uapi/asm	csky: Add support for libdw	2019-05-15 16:36:46 -03:00
h8300/include	License cleanup: add SPDX license identifier to uapi header files with no license	2017-11-02 11:19:54 +01:00
hexagon/include/uapi/asm	tools arch uapi: Copy missing unistd.h headers for arc, hexagon and riscv	2019-05-02 16:00:20 -04:00
ia64/include	ia64: tools: remove duplicate definition of ia64_mf() on ia64	2021-04-16 16:10:37 -07:00
microblaze/include/uapi/asm	License cleanup: add SPDX license identifier to uapi header files with no license	2017-11-02 11:19:54 +01:00
mips/include	perf tools: Copy uapi/asm/perf_regs.h from the kernel for MIPS	2021-06-01 10:07:46 -03:00
parisc/include/uapi/asm	parisc: Add MAP_UNINITIALIZED define	2020-10-15 08:10:39 +02:00
powerpc/include	perf powerpc: Add support to expose instruction and data address registers as part of extended regs	2021-10-25 13:47:42 -03:00
riscv/include/uapi/asm	Replace HTTP links with HTTPS ones: RISC-V	2020-07-30 11:37:40 -07:00
s390/include	tools headers UAPI s390: Sync ptrace.h kernel headers	2021-03-06 16:54:23 -03:00
sh/include	sh: remove sh5 support	2020-06-01 14:48:52 -04:00
sparc/include	tools headers UAPI: Update tools's copy of mman.h headers	2019-07-29 09:02:58 -03:00
x86	arm64 updates for 5.18	2022-03-21 10:46:39 -07:00
xtensa/include	tools headers uapi: Sync asm-generic/mman-common.h and linux/mman.h	2019-03-28 14:31:56 -03:00