Jesse Brandeburg 945a51517c intel drivers: repair missing flush operations ... after review of all intel drivers, found several instances where drivers had the incorrect pattern of: memory mapped write(); delay(); which should always be: memory mapped write(); write flush(); /* aka memory mapped read */ delay(); explanation: The reason for including the flush is that writes can be held (posted) in PCI/PCIe bridges, but the read always has to complete synchronously and therefore has to flush all pending writes to a device. If a write is held and followed by a delay, the delay means nothing because the write may not have reached hardware (maybe even not until the next read) Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>		2011-08-04 04:59:07 -07:00
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e1000_ethtool.c	intel drivers: repair missing flush operations	2011-08-04 04:59:07 -07:00
e1000_hw.c	intel drivers: repair missing flush operations	2011-08-04 04:59:07 -07:00
e1000_hw.h	Fix common misspellings	2011-03-31 11:26:23 -03:00
e1000_main.c	e1000: always call e1000_check_for_link() on e1000_ce4100 MACs.	2011-07-21 22:53:41 -07:00
e1000_osdep.h	e1000: fix sparse warning	2011-03-02 03:20:56 -08:00
e1000_param.c	Intel Wired LAN drivers: Use static const	2010-12-10 22:12:32 -08:00
e1000.h	e1000: do vlan cleanup	2011-07-21 13:47:57 -07:00
Makefile