Marek Vasut 34a01d9ea7 soc: imx: gpcv2: Turn domain->pgc into bitfield ... There is currently the MX8MM GPU domain, which is in fact a composite domain for both GPU2D and GPU3D. To correctly configure this domain, it is necessary to control both GPC_PGC_nCTRL(GPU_2D) and GPC_PGC_nCTRL(GPU_3D) at the same time. This is currently not possible. Turn the domain->pgc from value into bitfield and use for_each_set_bit() to iterate over all bits set in domain->pgc when configuring GPC_PGC_nCTRL register array. This way it is possible to configure all GPC_PGC_nCTRL registers required in a particular domain. This is a preparatory patch, no functional change. Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Frieder Schrempf <frieder.schrempf@kontron.de> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: NXP Linux Team <linux-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2021-10-04 15:53:01 +08:00
..
gpc.c	soc: imx: gpc: fix power up sequencing	2020-03-16 11:39:02 +08:00
gpcv2.c	soc: imx: gpcv2: Turn domain->pgc into bitfield	2021-10-04 15:53:01 +08:00
Kconfig	ARM: imx: fix imx8m dependencies	2021-01-11 09:36:11 +08:00
Makefile	firmware: imx: Move i.MX SCU soc driver into imx firmware folder	2020-07-13 10:02:00 +08:00
soc-imx8m.c	Revert "soc: imx8m: change to use platform driver"	2021-07-15 19:02:44 +08:00
soc-imx.c	ARM: imx: Initialize SoC ID on i.MX50	2021-05-13 15:42:21 +08:00