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500d14affd
The code in __cpu_soft_restart() uses x18 as an arbitrary temp register, which will shortly be disallowed. So use x8 instead. Link: https://patchwork.kernel.org/patch/9836877/ Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> [Sami: updated commit message] Signed-off-by: Sami Tolvanen <samitolvanen@google.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Will Deacon <will@kernel.org>
53 lines
1.3 KiB
ArmAsm
53 lines
1.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* CPU reset routines
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*
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* Copyright (C) 2001 Deep Blue Solutions Ltd.
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2015 Huawei Futurewei Technologies.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/sysreg.h>
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#include <asm/virt.h>
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.text
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.pushsection .idmap.text, "awx"
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/*
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* __cpu_soft_restart(el2_switch, entry, arg0, arg1, arg2) - Helper for
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* cpu_soft_restart.
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*
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* @el2_switch: Flag to indicate a switch to EL2 is needed.
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* @entry: Location to jump to for soft reset.
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* arg0: First argument passed to @entry. (relocation list)
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* arg1: Second argument passed to @entry.(physical kernel entry)
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* arg2: Third argument passed to @entry. (physical dtb address)
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*
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* Put the CPU into the same state as it would be if it had been reset, and
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* branch to what would be the reset vector. It must be executed with the
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* flat identity mapping.
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*/
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ENTRY(__cpu_soft_restart)
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/* Clear sctlr_el1 flags. */
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mrs x12, sctlr_el1
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ldr x13, =SCTLR_ELx_FLAGS
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bic x12, x12, x13
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pre_disable_mmu_workaround
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msr sctlr_el1, x12
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isb
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cbz x0, 1f // el2_switch?
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mov x0, #HVC_SOFT_RESTART
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hvc #0 // no return
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1: mov x8, x1 // entry
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mov x0, x2 // arg0
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mov x1, x3 // arg1
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mov x2, x4 // arg2
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br x8
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ENDPROC(__cpu_soft_restart)
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.popsection
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