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ASoC tegra PCM code still has explicit calls of dma_set_mask() and dma_set_coherent_mask(). Let's simplify with dma_set_mask_and_coherent(). Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20210114133337.1039-4-tiwai@suse.de Signed-off-by: Mark Brown <broonie@kernel.org>
302 lines
7.6 KiB
C
302 lines
7.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* tegra_pcm.c - Tegra PCM driver
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*
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* Author: Stephen Warren <swarren@nvidia.com>
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* Copyright (C) 2010,2012 - NVIDIA, Inc.
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*
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* Based on code copyright/by:
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*
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* Copyright (c) 2009-2010, NVIDIA Corporation.
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* Scott Peterson <speterson@nvidia.com>
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* Vijay Mali <vmali@nvidia.com>
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*
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* Copyright (C) 2010 Google, Inc.
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* Iliyan Malchev <malchev@google.com>
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*/
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#include <linux/module.h>
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#include <linux/dma-mapping.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/dmaengine_pcm.h>
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#include "tegra_pcm.h"
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static const struct snd_pcm_hardware tegra_pcm_hardware = {
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.info = SNDRV_PCM_INFO_MMAP |
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SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_INTERLEAVED,
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.period_bytes_min = 1024,
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.period_bytes_max = PAGE_SIZE,
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.periods_min = 2,
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.periods_max = 8,
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.buffer_bytes_max = PAGE_SIZE * 8,
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.fifo_size = 4,
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};
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static const struct snd_dmaengine_pcm_config tegra_dmaengine_pcm_config = {
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.pcm_hardware = &tegra_pcm_hardware,
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.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
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.prealloc_buffer_size = PAGE_SIZE * 8,
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};
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int tegra_pcm_platform_register(struct device *dev)
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{
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return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config, 0);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
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int tegra_pcm_platform_register_with_chan_names(struct device *dev,
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struct snd_dmaengine_pcm_config *config,
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char *txdmachan, char *rxdmachan)
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{
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*config = tegra_dmaengine_pcm_config;
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config->dma_dev = dev->parent;
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config->chan_names[0] = txdmachan;
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config->chan_names[1] = rxdmachan;
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return snd_dmaengine_pcm_register(dev, config, 0);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_platform_register_with_chan_names);
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void tegra_pcm_platform_unregister(struct device *dev)
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{
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return snd_dmaengine_pcm_unregister(dev);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_platform_unregister);
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int tegra_pcm_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_dmaengine_dai_dma_data *dmap;
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struct dma_chan *chan;
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struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
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int ret;
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if (rtd->dai_link->no_pcm)
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return 0;
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dmap = snd_soc_dai_get_dma_data(cpu_dai, substream);
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/* Set HW params now that initialization is complete */
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snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
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/* Ensure period size is multiple of 8 */
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ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
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SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
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if (ret) {
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dev_err(rtd->dev, "failed to set constraint %d\n", ret);
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return ret;
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}
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chan = dma_request_slave_channel(cpu_dai->dev, dmap->chan_name);
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if (!chan) {
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dev_err(cpu_dai->dev,
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"dmaengine request slave channel failed! (%s)\n",
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dmap->chan_name);
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return -ENODEV;
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}
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ret = snd_dmaengine_pcm_open(substream, chan);
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if (ret) {
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dev_err(rtd->dev,
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"dmaengine pcm open failed with err %d (%s)\n", ret,
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dmap->chan_name);
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dma_release_channel(chan);
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return ret;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_open);
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int tegra_pcm_close(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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if (rtd->dai_link->no_pcm)
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return 0;
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snd_dmaengine_pcm_close_release_chan(substream);
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return 0;
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_close);
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int tegra_pcm_hw_params(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_dmaengine_dai_dma_data *dmap;
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struct dma_slave_config slave_config;
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struct dma_chan *chan;
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int ret;
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if (rtd->dai_link->no_pcm)
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return 0;
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dmap = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
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if (!dmap)
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return 0;
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chan = snd_dmaengine_pcm_get_chan(substream);
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ret = snd_hwparams_to_dma_slave_config(substream, params,
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&slave_config);
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if (ret) {
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dev_err(rtd->dev, "hw params config failed with err %d\n", ret);
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return ret;
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}
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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slave_config.dst_addr = dmap->addr;
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slave_config.dst_maxburst = 8;
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} else {
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slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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slave_config.src_addr = dmap->addr;
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slave_config.src_maxburst = 8;
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}
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ret = dmaengine_slave_config(chan, &slave_config);
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if (ret < 0) {
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dev_err(rtd->dev, "dma slave config failed with err %d\n", ret);
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return ret;
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}
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snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
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return 0;
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_hw_params);
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int tegra_pcm_hw_free(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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if (rtd->dai_link->no_pcm)
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return 0;
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snd_pcm_set_runtime_buffer(substream, NULL);
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return 0;
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_hw_free);
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int tegra_pcm_mmap(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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struct vm_area_struct *vma)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_pcm_runtime *runtime = substream->runtime;
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if (rtd->dai_link->no_pcm)
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return 0;
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return dma_mmap_wc(substream->pcm->card->dev, vma, runtime->dma_area,
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runtime->dma_addr, runtime->dma_bytes);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_mmap);
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snd_pcm_uframes_t tegra_pcm_pointer(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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{
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return snd_dmaengine_pcm_pointer(substream);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_pointer);
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static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
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size_t size)
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{
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struct snd_pcm_substream *substream = pcm->streams[stream].substream;
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struct snd_dma_buffer *buf = &substream->dma_buffer;
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buf->area = dma_alloc_wc(pcm->card->dev, size, &buf->addr, GFP_KERNEL);
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if (!buf->area)
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return -ENOMEM;
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buf->private_data = NULL;
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buf->dev.type = SNDRV_DMA_TYPE_DEV;
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buf->dev.dev = pcm->card->dev;
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buf->bytes = size;
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return 0;
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}
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static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
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{
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struct snd_pcm_substream *substream;
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struct snd_dma_buffer *buf;
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substream = pcm->streams[stream].substream;
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if (!substream)
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return;
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buf = &substream->dma_buffer;
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if (!buf->area)
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return;
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dma_free_wc(pcm->card->dev, buf->bytes, buf->area, buf->addr);
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buf->area = NULL;
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}
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static int tegra_pcm_dma_allocate(struct snd_soc_pcm_runtime *rtd,
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size_t size)
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{
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struct snd_card *card = rtd->card->snd_card;
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struct snd_pcm *pcm = rtd->pcm;
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int ret;
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ret = dma_set_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
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if (ret < 0)
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return ret;
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if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
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ret = tegra_pcm_preallocate_dma_buffer(pcm,
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SNDRV_PCM_STREAM_PLAYBACK, size);
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if (ret)
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goto err;
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}
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if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
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ret = tegra_pcm_preallocate_dma_buffer(pcm,
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SNDRV_PCM_STREAM_CAPTURE, size);
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if (ret)
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goto err_free_play;
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}
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return 0;
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err_free_play:
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tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
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err:
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return ret;
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}
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int tegra_pcm_construct(struct snd_soc_component *component,
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struct snd_soc_pcm_runtime *rtd)
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{
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return tegra_pcm_dma_allocate(rtd, tegra_pcm_hardware.buffer_bytes_max);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_construct);
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void tegra_pcm_destruct(struct snd_soc_component *component,
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struct snd_pcm *pcm)
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{
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tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
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tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
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}
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EXPORT_SYMBOL_GPL(tegra_pcm_destruct);
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MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
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MODULE_DESCRIPTION("Tegra PCM ASoC driver");
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MODULE_LICENSE("GPL");
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