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0fe3ede794
S70GL02GS flash reports a single 256 MiB chip, but is really made up of two 128 MiB chips with 1024 sectors each. Without early fixups (top half of device cannot be written or erased): ff0000000.nor-boot: Found 1 x16 devices at 0x0 in 16-bit bank. <snip> Amd/Fujitsu Extended Query Table at 0x0040 Amd/Fujitsu Extended Query version 1.5. number of CFI chips: 1 With early fixups (entire device can be written and erased): Bad S70GL02GS CFI data; adjust to detect 2 chips ff0000000.nor-boot: Found 1 x16 devices at 0x0 in 16-bit bank. <snip> ff0000000.nor-boot: Found 1 x16 devices at 0x8000000 in 16-bit bank Amd/Fujitsu Extended Query Table at 0x0040 Amd/Fujitsu Extended Query version 1.5. number of CFI chips: 2 Signed-off-by: Aaron Sierra <asierra@xes-inc.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
463 lines
13 KiB
C
463 lines
13 KiB
C
/*
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Common Flash Interface probe code.
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(C) 2000 Red Hat. GPL'd.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include <asm/byteorder.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/mtd/xip.h>
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#include <linux/mtd/map.h>
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#include <linux/mtd/cfi.h>
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#include <linux/mtd/gen_probe.h>
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//#define DEBUG_CFI
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#ifdef DEBUG_CFI
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static void print_cfi_ident(struct cfi_ident *);
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#endif
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static int cfi_probe_chip(struct map_info *map, __u32 base,
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unsigned long *chip_map, struct cfi_private *cfi);
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static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
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struct mtd_info *cfi_probe(struct map_info *map);
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#ifdef CONFIG_MTD_XIP
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/* only needed for short periods, so this is rather simple */
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#define xip_disable() local_irq_disable()
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#define xip_allowed(base, map) \
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do { \
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(void) map_read(map, base); \
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xip_iprefetch(); \
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local_irq_enable(); \
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} while (0)
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#define xip_enable(base, map, cfi) \
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do { \
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cfi_qry_mode_off(base, map, cfi); \
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xip_allowed(base, map); \
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} while (0)
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#define xip_disable_qry(base, map, cfi) \
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do { \
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xip_disable(); \
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cfi_qry_mode_on(base, map, cfi); \
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} while (0)
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#else
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#define xip_disable() do { } while (0)
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#define xip_allowed(base, map) do { } while (0)
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#define xip_enable(base, map, cfi) do { } while (0)
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#define xip_disable_qry(base, map, cfi) do { } while (0)
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#endif
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/*
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* This fixup occurs immediately after reading the CFI structure and can affect
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* the number of chips detected, unlike cfi_fixup, which occurs after an
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* mtd_info structure has been created for the chip.
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*/
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struct cfi_early_fixup {
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uint16_t mfr;
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uint16_t id;
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void (*fixup)(struct cfi_private *cfi);
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};
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static void cfi_early_fixup(struct cfi_private *cfi,
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const struct cfi_early_fixup *fixups)
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{
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const struct cfi_early_fixup *f;
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for (f = fixups; f->fixup; f++) {
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if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) &&
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((f->id == CFI_ID_ANY) || (f->id == cfi->id))) {
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f->fixup(cfi);
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}
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}
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}
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/* check for QRY.
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in: interleave,type,mode
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ret: table index, <0 for error
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*/
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static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
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unsigned long *chip_map, struct cfi_private *cfi)
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{
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int i;
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if ((base + 0) >= map->size) {
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printk(KERN_NOTICE
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"Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
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(unsigned long)base, map->size -1);
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return 0;
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}
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if ((base + 0xff) >= map->size) {
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printk(KERN_NOTICE
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"Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
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(unsigned long)base + 0x55, map->size -1);
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return 0;
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}
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xip_disable();
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if (!cfi_qry_mode_on(base, map, cfi)) {
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xip_enable(base, map, cfi);
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return 0;
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}
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if (!cfi->numchips) {
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/* This is the first time we're called. Set up the CFI
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stuff accordingly and return */
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return cfi_chip_setup(map, cfi);
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}
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/* Check each previous chip to see if it's an alias */
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for (i=0; i < (base >> cfi->chipshift); i++) {
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unsigned long start;
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if(!test_bit(i, chip_map)) {
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/* Skip location; no valid chip at this address */
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continue;
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}
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start = i << cfi->chipshift;
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/* This chip should be in read mode if it's one
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we've already touched. */
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if (cfi_qry_present(map, start, cfi)) {
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/* Eep. This chip also had the QRY marker.
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* Is it an alias for the new one? */
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cfi_qry_mode_off(start, map, cfi);
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/* If the QRY marker goes away, it's an alias */
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if (!cfi_qry_present(map, start, cfi)) {
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xip_allowed(base, map);
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printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
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map->name, base, start);
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return 0;
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}
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/* Yes, it's actually got QRY for data. Most
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* unfortunate. Stick the new chip in read mode
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* too and if it's the same, assume it's an alias. */
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/* FIXME: Use other modes to do a proper check */
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cfi_qry_mode_off(base, map, cfi);
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if (cfi_qry_present(map, base, cfi)) {
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xip_allowed(base, map);
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printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
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map->name, base, start);
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return 0;
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}
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}
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}
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/* OK, if we got to here, then none of the previous chips appear to
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be aliases for the current one. */
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set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
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cfi->numchips++;
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/* Put it back into Read Mode */
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cfi_qry_mode_off(base, map, cfi);
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xip_allowed(base, map);
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printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
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map->name, cfi->interleave, cfi->device_type*8, base,
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map->bankwidth*8);
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return 1;
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}
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static void fixup_s70gl02gs_chips(struct cfi_private *cfi)
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{
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/*
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* S70GL02GS flash reports a single 256 MiB chip, but is really made up
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* of two 128 MiB chips with 1024 sectors each.
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*/
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cfi->cfiq->DevSize = 27;
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cfi->cfiq->EraseRegionInfo[0] = 0x20003ff;
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pr_warn("Bad S70GL02GS CFI data; adjust to detect 2 chips\n");
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}
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static const struct cfi_early_fixup cfi_early_fixup_table[] = {
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{ CFI_MFR_AMD, 0x4801, fixup_s70gl02gs_chips },
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{ },
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};
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static int __xipram cfi_chip_setup(struct map_info *map,
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struct cfi_private *cfi)
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{
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int ofs_factor = cfi->interleave*cfi->device_type;
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__u32 base = 0;
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int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
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int i;
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int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
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xip_enable(base, map, cfi);
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#ifdef DEBUG_CFI
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printk("Number of erase regions: %d\n", num_erase_regions);
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#endif
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if (!num_erase_regions)
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return 0;
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cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
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if (!cfi->cfiq)
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return 0;
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memset(cfi->cfiq,0,sizeof(struct cfi_ident));
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cfi->cfi_mode = CFI_MODE_CFI;
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cfi->sector_erase_cmd = CMD(0x30);
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/* Read the CFI info structure */
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xip_disable_qry(base, map, cfi);
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for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
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((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
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/* Do any necessary byteswapping */
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cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
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cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
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cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
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cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
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cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
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cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
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#ifdef DEBUG_CFI
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/* Dump the information therein */
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print_cfi_ident(cfi->cfiq);
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#endif
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for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
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cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
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#ifdef DEBUG_CFI
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printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
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i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
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(cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
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#endif
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}
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if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
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addr_unlock1 = 0x5555;
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addr_unlock2 = 0x2AAA;
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}
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/*
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* Note we put the device back into Read Mode BEFORE going into Auto
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* Select Mode, as some devices support nesting of modes, others
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* don't. This way should always work.
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* On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
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* so should be treated as nops or illegal (and so put the device
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* back into Read Mode, which is a nop in this case).
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*/
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cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
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cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
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cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
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cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
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cfi->mfr = cfi_read_query16(map, base);
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cfi->id = cfi_read_query16(map, base + ofs_factor);
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/* Get AMD/Spansion extended JEDEC ID */
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if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
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cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
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cfi_read_query(map, base + 0xf * ofs_factor);
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/* Put it back into Read Mode */
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cfi_qry_mode_off(base, map, cfi);
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xip_allowed(base, map);
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cfi_early_fixup(cfi, cfi_early_fixup_table);
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printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
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map->name, cfi->interleave, cfi->device_type*8, base,
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map->bankwidth*8, cfi->mfr, cfi->id);
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return 1;
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}
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#ifdef DEBUG_CFI
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static char *vendorname(__u16 vendor)
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{
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switch (vendor) {
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case P_ID_NONE:
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return "None";
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case P_ID_INTEL_EXT:
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return "Intel/Sharp Extended";
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case P_ID_AMD_STD:
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return "AMD/Fujitsu Standard";
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case P_ID_INTEL_STD:
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return "Intel/Sharp Standard";
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case P_ID_AMD_EXT:
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return "AMD/Fujitsu Extended";
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case P_ID_WINBOND:
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return "Winbond Standard";
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case P_ID_ST_ADV:
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return "ST Advanced";
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case P_ID_MITSUBISHI_STD:
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return "Mitsubishi Standard";
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case P_ID_MITSUBISHI_EXT:
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return "Mitsubishi Extended";
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case P_ID_SST_PAGE:
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return "SST Page Write";
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case P_ID_SST_OLD:
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return "SST 39VF160x/39VF320x";
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case P_ID_INTEL_PERFORMANCE:
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return "Intel Performance Code";
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case P_ID_INTEL_DATA:
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return "Intel Data";
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case P_ID_RESERVED:
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return "Not Allowed / Reserved for Future Use";
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default:
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return "Unknown";
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}
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}
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static void print_cfi_ident(struct cfi_ident *cfip)
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{
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#if 0
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if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
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printk("Invalid CFI ident structure.\n");
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return;
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}
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#endif
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printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
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if (cfip->P_ADR)
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printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
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else
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printk("No Primary Algorithm Table\n");
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printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
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if (cfip->A_ADR)
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printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
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else
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printk("No Alternate Algorithm Table\n");
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printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
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printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
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if (cfip->VppMin) {
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printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
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printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
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}
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else
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printk("No Vpp line\n");
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printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
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printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
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if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
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printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
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printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
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}
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else
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printk("Full buffer write not supported\n");
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printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
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printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
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if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
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printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
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printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
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}
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else
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printk("Chip erase not supported\n");
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printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
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printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
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switch(cfip->InterfaceDesc) {
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case CFI_INTERFACE_X8_ASYNC:
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printk(" - x8-only asynchronous interface\n");
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break;
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case CFI_INTERFACE_X16_ASYNC:
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printk(" - x16-only asynchronous interface\n");
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break;
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case CFI_INTERFACE_X8_BY_X16_ASYNC:
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printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n");
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break;
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case CFI_INTERFACE_X32_ASYNC:
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printk(" - x32-only asynchronous interface\n");
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break;
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case CFI_INTERFACE_X16_BY_X32_ASYNC:
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printk(" - supports x16 and x32 via Word# with asynchronous interface\n");
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break;
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case CFI_INTERFACE_NOT_ALLOWED:
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printk(" - Not Allowed / Reserved\n");
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break;
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default:
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printk(" - Unknown\n");
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break;
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}
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printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
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printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
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}
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#endif /* DEBUG_CFI */
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static struct chip_probe cfi_chip_probe = {
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.name = "CFI",
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.probe_chip = cfi_probe_chip
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};
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struct mtd_info *cfi_probe(struct map_info *map)
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{
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/*
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* Just use the generic probe stuff to call our CFI-specific
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* chip_probe routine in all the possible permutations, etc.
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*/
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return mtd_do_chip_probe(map, &cfi_chip_probe);
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}
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static struct mtd_chip_driver cfi_chipdrv = {
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.probe = cfi_probe,
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.name = "cfi_probe",
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.module = THIS_MODULE
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};
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static int __init cfi_probe_init(void)
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{
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register_mtd_chip_driver(&cfi_chipdrv);
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return 0;
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}
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static void __exit cfi_probe_exit(void)
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{
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unregister_mtd_chip_driver(&cfi_chipdrv);
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}
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module_init(cfi_probe_init);
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module_exit(cfi_probe_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
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MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
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