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The SCIF driver is transitioning to platform resources. Board code will thus need to define an array of resources for each SCIF device. This is incompatible with the macro-based SCIF platform data definition as an array. Rework the macro to define platform data as individual structures. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
106 lines
3.2 KiB
C
106 lines
3.2 KiB
C
/*
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* r7s72100 processor support
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/of_platform.h>
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#include <linux/serial_sci.h>
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#include <linux/sh_timer.h>
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#include <mach/common.h>
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#include <mach/irqs.h>
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#include <mach/r7s72100.h>
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#include <asm/mach/arch.h>
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#define R7S72100_SCIF(index, baseaddr, irq) \
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static const struct plat_sci_port scif##index##_platform_data = { \
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.type = PORT_SCIF, \
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.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
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.scbrr_algo_id = SCBRR_ALGO_2, \
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.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
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SCSCR_REIE, \
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.mapbase = baseaddr, \
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.irqs = { irq + 1, irq + 2, irq + 3, irq }, \
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}
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R7S72100_SCIF(0, 0xe8007000, gic_iid(221));
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R7S72100_SCIF(1, 0xe8007800, gic_iid(225));
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R7S72100_SCIF(2, 0xe8008000, gic_iid(229));
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R7S72100_SCIF(3, 0xe8008800, gic_iid(233));
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R7S72100_SCIF(4, 0xe8009000, gic_iid(237));
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R7S72100_SCIF(5, 0xe8009800, gic_iid(241));
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R7S72100_SCIF(6, 0xe800a000, gic_iid(245));
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R7S72100_SCIF(7, 0xe800a800, gic_iid(249));
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#define r7s72100_register_scif(index) \
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platform_device_register_data(&platform_bus, "sh-sci", index, \
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&scif##index##_platform_data, \
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sizeof(scif##index##_platform_data))
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static struct sh_timer_config mtu2_0_platform_data __initdata = {
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.name = "MTU2_0",
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.timer_bit = 0,
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.channel_offset = -0x80,
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.clockevent_rating = 200,
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};
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static struct resource mtu2_0_resources[] __initdata = {
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DEFINE_RES_MEM(0xfcff0300, 0x27),
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DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */
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};
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#define r7s72100_register_mtu2(idx) \
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platform_device_register_resndata(&platform_bus, "sh_mtu2", \
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idx, mtu2_##idx##_resources, \
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ARRAY_SIZE(mtu2_##idx##_resources), \
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&mtu2_##idx##_platform_data, \
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sizeof(struct sh_timer_config))
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void __init r7s72100_add_dt_devices(void)
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{
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r7s72100_register_scif(0);
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r7s72100_register_scif(1);
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r7s72100_register_scif(2);
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r7s72100_register_scif(3);
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r7s72100_register_scif(4);
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r7s72100_register_scif(5);
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r7s72100_register_scif(6);
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r7s72100_register_scif(7);
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r7s72100_register_mtu2(0);
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}
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void __init r7s72100_init_early(void)
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{
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shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */
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}
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#ifdef CONFIG_USE_OF
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static const char *r7s72100_boards_compat_dt[] __initdata = {
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"renesas,r7s72100",
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NULL,
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};
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DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
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.init_early = r7s72100_init_early,
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.dt_compat = r7s72100_boards_compat_dt,
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MACHINE_END
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#endif /* CONFIG_USE_OF */
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