Jisheng Zhang 31ca5d4926 riscv: errata: thead: only set cbom size & noncoherent during boot ... The CBOM size and whether the HW is noncoherent is known and determined during booting and won't change after that. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230614165504.532-2-jszhang@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-07-06 10:32:03 -07:00
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sifive	RISC-V: fix sifive and thead section mismatches in errata	2023-04-29 13:18:19 -07:00
thead	riscv: errata: thead: only set cbom size & noncoherent during boot	2023-07-06 10:32:03 -07:00
Makefile	riscv: add memory-type errata for T-Head	2022-05-11 21:36:33 -07:00