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2f478b6011
These updates include: - Two patches to fix significant bugs in floating point register context handling - A minor fix in RISC-V flush_tlb_page(), to supply a valid end address to flush_tlb_range() - Two minor defconfig additions: to build the virtio hwrng driver by default (for QEMU targets), and to partially synchronize the 32-bit defconfig with the 64-bit defconfig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl1XVWUACgkQx4+xDQu9 KkvF8w//b5zWgQVjTpPtaBDz18AKeSRivBAYDexJOangtbz7j7B0uuR3Rjd7nWpP Ky3R9UKKTms9/wg/jnY0bSd7FzNW8om22gnbTDPTIq4EEuTrsHBIIyFd/P+/5w5p zDl5qrWCDNQoYQ9OlBRTAGFZuw1fv5Nd90FDZtI0GlTVdZDu8TPuL2o8HQ3DcSVM /yaqm/ceB6mNmIjY6YF3YviwWn3KcfeHKqw3P0SDAPFwBF4kP8q/47QqAh8a1uVr M5upTf5ccnGe4lJhLBQLOir7Ua80rH11ZBGlVWfN2Vxf8aFaYPfjYBnm2ByJaHBd Ooux1u1fghLqWBRfiNaIwalOZBVLyWF9Q3FpCYauJNsJ0ldHrkB/Pdfo+lGEUqKq xx6SPwA9tnIiUe0X8Rh2duOz0e7HjXzU6J6VmdEGydLNlwTz/vwFeEqWDfpEooXE AEBr2vU44CQ8s0TWDD2W3oGV5qwyCmI86Ib9jcIpZmrbVGt6lukpD7DDOCD3hjhz moh7H4thytS7su+O4VZwsshYfQ/JX5Y9YhGbi7xYh8LUkHciREja1Qi14owkzkcd A8u6rvWkWqUxuqGJTkMSlU61O02+z2LoTV4Iwvm6Jt55OGmx58gDHDATobyRBn2b HyKyQKW4ur9pZQGlAk9tfglSeTTP6FcX6ZMapubM32VWJ/ZNzcM= =dwBU -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: - Two patches to fix significant bugs in floating point register context handling - A minor fix in RISC-V flush_tlb_page(), to supply a valid end address to flush_tlb_range() - Two minor defconfig additions: to build the virtio hwrng driver by default (for QEMU targets), and to partially synchronize the 32-bit defconfig with the 64-bit defconfig * tag 'riscv/for-v5.3-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Make __fstate_clean() work correctly. riscv: Correct the initialized flow of FP register riscv: defconfig: Update the defconfig riscv: rv32_defconfig: Update the defconfig riscv: fix flush_tlb_range() end address for flush_tlb_page() |
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