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d816b3cc77
Follow the recent trend for the license description, and also fix the wrongly stated X11 to MIT. As already pointed on the DT ML, the X11 license text [1] is explicitly for the X Consortium and has a couple of extra clauses. The MIT license text [2] is actually what the current DT files claim. [1] https://spdx.org/licenses/X11.html [2] https://spdx.org/licenses/MIT.html Cc: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
40 lines
780 B
Plaintext
40 lines
780 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree Include file for Marvell 98dx3336 family SoC
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*
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* Copyright (C) 2016 Allied Telesis Labs
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*
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* Contains definitions specific to the 98dx3236 SoC that are not
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* common to all Armada XP SoCs.
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*/
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#include "armada-xp-98dx3236.dtsi"
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/ {
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model = "Marvell 98DX3336 SoC";
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compatible = "marvell,armadaxp-98dx3336", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
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cpus {
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cpu@1 {
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device_type = "cpu";
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compatible = "marvell,sheeva-v7";
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reg = <1>;
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clocks = <&cpuclk 1>;
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clock-latency = <1000000>;
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};
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};
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soc {
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internal-regs {
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resume@20980 {
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compatible = "marvell,98dx3336-resume-ctrl";
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reg = <0x20980 0x10>;
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};
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};
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};
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};
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&pp0 {
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compatible = "marvell,prestera-98dx3336";
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};
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