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e89c2e815e
There are two related issues that appear in certain combinations with clang and GNU binutils. The first occurs when a version of clang that supports zicsr or zifencei via '-march=' [1] (i.e, >= 17.x) is used in combination with a version of GNU binutils that do not recognize zicsr and zifencei in the '-march=' value (i.e., < 2.36): riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zicsr2p0_zifencei2p0: Invalid or unknown z ISA extension: 'zifencei' riscv64-linux-gnu-ld: failed to merge target specific data of file fs/efivarfs/file.o riscv64-linux-gnu-ld: -march=rv64i2p0_m2p0_a2p0_c2p0_zicsr2p0_zifencei2p0: Invalid or unknown z ISA extension: 'zifencei' riscv64-linux-gnu-ld: failed to merge target specific data of file fs/efivarfs/super.o The second occurs when a version of clang that does not support zicsr or zifencei via '-march=' (i.e., <= 16.x) is used in combination with a version of GNU as that defaults to a newer ISA base spec, which requires specifying zicsr and zifencei in the '-march=' value explicitly (i.e, >= 2.38): ../arch/riscv/kernel/kexec_relocate.S: Assembler messages: ../arch/riscv/kernel/kexec_relocate.S:147: Error: unrecognized opcode `fence.i', extension `zifencei' required clang-12: error: assembler command failed with exit code 1 (use -v to see invocation) This is the same issue addressed by commit6df2a016c0
("riscv: fix build with binutils 2.38") (see [2] for additional information) but older versions of clang miss out on it because the cc-option check fails: clang-12: error: invalid arch name 'rv64imac_zicsr_zifencei', unsupported standard user-level extension 'zicsr' clang-12: error: invalid arch name 'rv64imac_zicsr_zifencei', unsupported standard user-level extension 'zicsr' To resolve the first issue, only attempt to add zicsr and zifencei to the march string when using the GNU assembler 2.38 or newer, which is when the default ISA spec was updated, requiring these extensions to be specified explicitly. LLVM implements an older version of the base specification for all currently released versions, so these instructions are available as part of the 'i' extension. If LLVM's implementation is updated in the future, a CONFIG_AS_IS_LLVM condition can be added to CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI. To resolve the second issue, use version 2.2 of the base ISA spec when using an older version of clang that does not support zicsr or zifencei via '-march=', as that is the spec version most compatible with the one clang/LLVM implements and avoids the need to specify zicsr and zifencei explicitly due to still being a part of 'i'. [1]:22e199e6af
[2]: https://lore.kernel.org/ZAxT7T9Xy1Fo3d5W@aurel32.net/ Cc: stable@vger.kernel.org Link: https://github.com/ClangBuiltLinux/linux/issues/1808 Co-developed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230313-riscv-zicsr-zifencei-fiasco-v1-1-dd1b7840a551@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
186 lines
5.3 KiB
Makefile
186 lines
5.3 KiB
Makefile
# This file is included by the global makefile so that you can add your own
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# architecture-specific flags and dependencies.
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#
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# This file is subject to the terms and conditions of the GNU General Public
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# License. See the file "COPYING" in the main directory of this archive
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# for more details.
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#
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OBJCOPYFLAGS := -O binary
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LDFLAGS_vmlinux :=
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ifeq ($(CONFIG_DYNAMIC_FTRACE),y)
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LDFLAGS_vmlinux := --no-relax
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KBUILD_CPPFLAGS += -DCC_USING_PATCHABLE_FUNCTION_ENTRY
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ifeq ($(CONFIG_RISCV_ISA_C),y)
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CC_FLAGS_FTRACE := -fpatchable-function-entry=4
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else
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CC_FLAGS_FTRACE := -fpatchable-function-entry=2
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endif
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endif
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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KBUILD_CFLAGS_MODULE += -mcmodel=medany
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endif
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export BITS
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ifeq ($(CONFIG_ARCH_RV64I),y)
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BITS := 64
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UTS_MACHINE := riscv64
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KBUILD_CFLAGS += -mabi=lp64
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KBUILD_AFLAGS += -mabi=lp64
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KBUILD_LDFLAGS += -melf64lriscv
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else
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BITS := 32
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UTS_MACHINE := riscv32
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KBUILD_CFLAGS += -mabi=ilp32
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KBUILD_AFLAGS += -mabi=ilp32
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KBUILD_LDFLAGS += -melf32lriscv
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endif
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ifeq ($(CONFIG_LD_IS_LLD),y)
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ifeq ($(call test-lt, $(CONFIG_LLD_VERSION), 150000),y)
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KBUILD_CFLAGS += -mno-relax
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KBUILD_AFLAGS += -mno-relax
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ifndef CONFIG_AS_IS_LLVM
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KBUILD_CFLAGS += -Wa,-mno-relax
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KBUILD_AFLAGS += -Wa,-mno-relax
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endif
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endif
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endif
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# ISA string setting
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riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima
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riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima
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riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd
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riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c
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ifdef CONFIG_TOOLCHAIN_NEEDS_OLD_ISA_SPEC
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KBUILD_CFLAGS += -Wa,-misa-spec=2.2
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KBUILD_AFLAGS += -Wa,-misa-spec=2.2
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else
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riscv-march-$(CONFIG_TOOLCHAIN_NEEDS_EXPLICIT_ZICSR_ZIFENCEI) := $(riscv-march-y)_zicsr_zifencei
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endif
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# Check if the toolchain supports Zihintpause extension
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riscv-march-$(CONFIG_TOOLCHAIN_HAS_ZIHINTPAUSE) := $(riscv-march-y)_zihintpause
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KBUILD_CFLAGS += -march=$(subst fd,,$(riscv-march-y))
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KBUILD_AFLAGS += -march=$(riscv-march-y)
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KBUILD_CFLAGS += -mno-save-restore
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KBUILD_CFLAGS += -DCONFIG_PAGE_OFFSET=$(CONFIG_PAGE_OFFSET)
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ifeq ($(CONFIG_CMODEL_MEDLOW),y)
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KBUILD_CFLAGS += -mcmodel=medlow
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endif
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ifeq ($(CONFIG_CMODEL_MEDANY),y)
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KBUILD_CFLAGS += -mcmodel=medany
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endif
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ifeq ($(CONFIG_PERF_EVENTS),y)
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KBUILD_CFLAGS += -fno-omit-frame-pointer
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endif
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# Avoid generating .eh_frame sections.
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KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables
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# The RISC-V attributes frequently cause compatibility issues and provide no
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# information, so just turn them off.
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KBUILD_CFLAGS += $(call cc-option,-mno-riscv-attribute)
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KBUILD_AFLAGS += $(call cc-option,-mno-riscv-attribute)
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KBUILD_CFLAGS += $(call as-option,-Wa$(comma)-mno-arch-attr)
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KBUILD_AFLAGS += $(call as-option,-Wa$(comma)-mno-arch-attr)
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KBUILD_CFLAGS_MODULE += $(call cc-option,-mno-relax)
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KBUILD_AFLAGS_MODULE += $(call as-option,-Wa$(comma)-mno-relax)
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# GCC versions that support the "-mstrict-align" option default to allowing
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# unaligned accesses. While unaligned accesses are explicitly allowed in the
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# RISC-V ISA, they're emulated by machine mode traps on all extant
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# architectures. It's faster to have GCC emit only aligned accesses.
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KBUILD_CFLAGS += $(call cc-option,-mstrict-align)
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ifeq ($(CONFIG_STACKPROTECTOR_PER_TASK),y)
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prepare: stack_protector_prepare
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stack_protector_prepare: prepare0
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$(eval KBUILD_CFLAGS += -mstack-protector-guard=tls \
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-mstack-protector-guard-reg=tp \
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-mstack-protector-guard-offset=$(shell \
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awk '{if ($$2 == "TSK_STACK_CANARY") print $$3;}' \
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include/generated/asm-offsets.h))
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endif
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# arch specific predefines for sparse
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CHECKFLAGS += -D__riscv -D__riscv_xlen=$(BITS)
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# Default target when executing plain make
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boot := arch/riscv/boot
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ifeq ($(CONFIG_XIP_KERNEL),y)
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KBUILD_IMAGE := $(boot)/xipImage
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else
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KBUILD_IMAGE := $(boot)/Image.gz
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endif
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libs-y += arch/riscv/lib/
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libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
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PHONY += vdso_install
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vdso_install:
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$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso $@
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$(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
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$(build)=arch/riscv/kernel/compat_vdso compat_$@)
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ifeq ($(KBUILD_EXTMOD),)
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ifeq ($(CONFIG_MMU),y)
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prepare: vdso_prepare
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vdso_prepare: prepare0
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$(Q)$(MAKE) $(build)=arch/riscv/kernel/vdso include/generated/vdso-offsets.h
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$(if $(CONFIG_COMPAT),$(Q)$(MAKE) \
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$(build)=arch/riscv/kernel/compat_vdso include/generated/compat_vdso-offsets.h)
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endif
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endif
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ifneq ($(CONFIG_XIP_KERNEL),y)
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ifeq ($(CONFIG_RISCV_M_MODE)$(CONFIG_ARCH_CANAAN),yy)
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KBUILD_IMAGE := $(boot)/loader.bin
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else
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ifeq ($(CONFIG_EFI_ZBOOT),)
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KBUILD_IMAGE := $(boot)/Image.gz
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else
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KBUILD_IMAGE := $(boot)/vmlinuz.efi
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endif
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endif
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endif
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BOOT_TARGETS := Image Image.gz loader loader.bin xipImage vmlinuz.efi
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all: $(notdir $(KBUILD_IMAGE))
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$(BOOT_TARGETS): vmlinux
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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@$(kecho) ' Kernel: $(boot)/$@ is ready'
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Image.%: Image
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$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
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install: KBUILD_IMAGE := $(boot)/Image
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zinstall: KBUILD_IMAGE := $(boot)/Image.gz
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install zinstall:
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$(call cmd,install)
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PHONY += rv32_randconfig
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rv32_randconfig:
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$(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/32-bit.config \
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-f $(srctree)/Makefile randconfig
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PHONY += rv64_randconfig
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rv64_randconfig:
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$(Q)$(MAKE) KCONFIG_ALLCONFIG=$(srctree)/arch/riscv/configs/64-bit.config \
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-f $(srctree)/Makefile randconfig
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PHONY += rv32_defconfig
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rv32_defconfig:
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$(Q)$(MAKE) -f $(srctree)/Makefile defconfig 32-bit.config
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