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95364f3670
In case a driver wants to return an error from qc_prep, return enum ata_completion_errors. sata_mv is one of those drivers -- see the next patch. Other drivers return the newly defined AC_ERR_OK. [v2] use enum ata_completion_errors and AC_ERR_OK. Signed-off-by: Jiri Slaby <jslaby@suse.cz> Cc: Jens Axboe <axboe@kernel.dk> Cc: linux-ide@vger.kernel.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
325 lines
7.9 KiB
C
325 lines
7.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Generic PXA PATA driver
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*
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* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/blkdev.h>
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#include <linux/ata.h>
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#include <linux/libata.h>
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#include <linux/platform_device.h>
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#include <linux/dmaengine.h>
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#include <linux/slab.h>
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#include <linux/completion.h>
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#include <scsi/scsi_host.h>
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#include <linux/platform_data/ata-pxa.h>
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#define DRV_NAME "pata_pxa"
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#define DRV_VERSION "0.1"
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struct pata_pxa_data {
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struct dma_chan *dma_chan;
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dma_cookie_t dma_cookie;
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struct completion dma_done;
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};
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/*
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* DMA interrupt handler.
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*/
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static void pxa_ata_dma_irq(void *d)
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{
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struct pata_pxa_data *pd = d;
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enum dma_status status;
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status = dmaengine_tx_status(pd->dma_chan, pd->dma_cookie, NULL);
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if (status == DMA_ERROR || status == DMA_COMPLETE)
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complete(&pd->dma_done);
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}
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/*
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* Prepare taskfile for submission.
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*/
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static enum ata_completion_errors pxa_qc_prep(struct ata_queued_cmd *qc)
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{
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struct pata_pxa_data *pd = qc->ap->private_data;
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struct dma_async_tx_descriptor *tx;
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enum dma_transfer_direction dir;
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if (!(qc->flags & ATA_QCFLAG_DMAMAP))
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return AC_ERR_OK;
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dir = (qc->dma_dir == DMA_TO_DEVICE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM);
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tx = dmaengine_prep_slave_sg(pd->dma_chan, qc->sg, qc->n_elem, dir,
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DMA_PREP_INTERRUPT);
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if (!tx) {
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ata_dev_err(qc->dev, "prep_slave_sg() failed\n");
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return AC_ERR_OK;
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}
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tx->callback = pxa_ata_dma_irq;
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tx->callback_param = pd;
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pd->dma_cookie = dmaengine_submit(tx);
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return AC_ERR_OK;
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}
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/*
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* Configure the DMA controller, load the DMA descriptors, but don't start the
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* DMA controller yet. Only issue the ATA command.
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*/
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static void pxa_bmdma_setup(struct ata_queued_cmd *qc)
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{
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qc->ap->ops->sff_exec_command(qc->ap, &qc->tf);
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}
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/*
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* Execute the DMA transfer.
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*/
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static void pxa_bmdma_start(struct ata_queued_cmd *qc)
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{
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struct pata_pxa_data *pd = qc->ap->private_data;
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init_completion(&pd->dma_done);
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dma_async_issue_pending(pd->dma_chan);
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}
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/*
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* Wait until the DMA transfer completes, then stop the DMA controller.
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*/
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static void pxa_bmdma_stop(struct ata_queued_cmd *qc)
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{
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struct pata_pxa_data *pd = qc->ap->private_data;
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enum dma_status status;
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status = dmaengine_tx_status(pd->dma_chan, pd->dma_cookie, NULL);
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if (status != DMA_ERROR && status != DMA_COMPLETE &&
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wait_for_completion_timeout(&pd->dma_done, HZ))
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ata_dev_err(qc->dev, "Timeout waiting for DMA completion!");
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dmaengine_terminate_all(pd->dma_chan);
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}
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/*
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* Read DMA status. The bmdma_stop() will take care of properly finishing the
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* DMA transfer so we always have DMA-complete interrupt here.
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*/
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static unsigned char pxa_bmdma_status(struct ata_port *ap)
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{
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struct pata_pxa_data *pd = ap->private_data;
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unsigned char ret = ATA_DMA_INTR;
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struct dma_tx_state state;
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enum dma_status status;
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status = dmaengine_tx_status(pd->dma_chan, pd->dma_cookie, &state);
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if (status != DMA_COMPLETE)
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ret |= ATA_DMA_ERR;
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return ret;
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}
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/*
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* No IRQ register present so we do nothing.
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*/
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static void pxa_irq_clear(struct ata_port *ap)
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{
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}
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/*
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* Check for ATAPI DMA. ATAPI DMA is unsupported by this driver. It's still
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* unclear why ATAPI has DMA issues.
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*/
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static int pxa_check_atapi_dma(struct ata_queued_cmd *qc)
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{
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return -EOPNOTSUPP;
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}
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static struct scsi_host_template pxa_ata_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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};
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static struct ata_port_operations pxa_ata_port_ops = {
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.inherits = &ata_bmdma_port_ops,
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.cable_detect = ata_cable_40wire,
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.bmdma_setup = pxa_bmdma_setup,
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.bmdma_start = pxa_bmdma_start,
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.bmdma_stop = pxa_bmdma_stop,
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.bmdma_status = pxa_bmdma_status,
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.check_atapi_dma = pxa_check_atapi_dma,
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.sff_irq_clear = pxa_irq_clear,
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.qc_prep = pxa_qc_prep,
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};
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static int pxa_ata_probe(struct platform_device *pdev)
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{
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struct ata_host *host;
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struct ata_port *ap;
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struct pata_pxa_data *data;
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struct resource *cmd_res;
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struct resource *ctl_res;
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struct resource *dma_res;
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struct resource *irq_res;
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struct pata_pxa_pdata *pdata = dev_get_platdata(&pdev->dev);
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struct dma_slave_config config;
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int ret = 0;
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/*
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* Resource validation, three resources are needed:
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* - CMD port base address
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* - CTL port base address
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* - DMA port base address
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* - IRQ pin
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*/
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if (pdev->num_resources != 4) {
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dev_err(&pdev->dev, "invalid number of resources\n");
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return -EINVAL;
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}
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/*
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* CMD port base address
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*/
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cmd_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (unlikely(cmd_res == NULL))
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return -EINVAL;
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/*
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* CTL port base address
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*/
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ctl_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (unlikely(ctl_res == NULL))
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return -EINVAL;
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/*
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* DMA port base address
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*/
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dma_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
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if (unlikely(dma_res == NULL))
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return -EINVAL;
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/*
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* IRQ pin
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*/
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irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (unlikely(irq_res == NULL))
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return -EINVAL;
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/*
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* Allocate the host
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*/
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host = ata_host_alloc(&pdev->dev, 1);
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if (!host)
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return -ENOMEM;
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ap = host->ports[0];
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ap->ops = &pxa_ata_port_ops;
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ap->pio_mask = ATA_PIO4;
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ap->mwdma_mask = ATA_MWDMA2;
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ap->ioaddr.cmd_addr = devm_ioremap(&pdev->dev, cmd_res->start,
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resource_size(cmd_res));
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ap->ioaddr.ctl_addr = devm_ioremap(&pdev->dev, ctl_res->start,
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resource_size(ctl_res));
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ap->ioaddr.bmdma_addr = devm_ioremap(&pdev->dev, dma_res->start,
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resource_size(dma_res));
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/*
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* Adjust register offsets
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*/
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ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
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ap->ioaddr.data_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_DATA << pdata->reg_shift);
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ap->ioaddr.error_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_ERR << pdata->reg_shift);
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ap->ioaddr.feature_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_FEATURE << pdata->reg_shift);
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ap->ioaddr.nsect_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_NSECT << pdata->reg_shift);
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ap->ioaddr.lbal_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_LBAL << pdata->reg_shift);
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ap->ioaddr.lbam_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_LBAM << pdata->reg_shift);
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ap->ioaddr.lbah_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_LBAH << pdata->reg_shift);
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ap->ioaddr.device_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_DEVICE << pdata->reg_shift);
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ap->ioaddr.status_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_STATUS << pdata->reg_shift);
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ap->ioaddr.command_addr = ap->ioaddr.cmd_addr +
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(ATA_REG_CMD << pdata->reg_shift);
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/*
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* Allocate and load driver's internal data structure
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*/
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data = devm_kzalloc(&pdev->dev, sizeof(struct pata_pxa_data),
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GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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ap->private_data = data;
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memset(&config, 0, sizeof(config));
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config.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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config.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
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config.src_addr = dma_res->start;
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config.dst_addr = dma_res->start;
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config.src_maxburst = 32;
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config.dst_maxburst = 32;
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/*
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* Request the DMA channel
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*/
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data->dma_chan =
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dma_request_slave_channel(&pdev->dev, "data");
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if (!data->dma_chan)
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return -EBUSY;
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ret = dmaengine_slave_config(data->dma_chan, &config);
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if (ret < 0) {
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dev_err(&pdev->dev, "dma configuration failed: %d\n", ret);
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return ret;
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}
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/*
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* Activate the ATA host
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*/
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ret = ata_host_activate(host, irq_res->start, ata_sff_interrupt,
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pdata->irq_flags, &pxa_ata_sht);
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if (ret)
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dma_release_channel(data->dma_chan);
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return ret;
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}
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static int pxa_ata_remove(struct platform_device *pdev)
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{
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struct ata_host *host = platform_get_drvdata(pdev);
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struct pata_pxa_data *data = host->ports[0]->private_data;
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dma_release_channel(data->dma_chan);
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ata_host_detach(host);
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return 0;
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}
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static struct platform_driver pxa_ata_driver = {
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.probe = pxa_ata_probe,
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.remove = pxa_ata_remove,
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.driver = {
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.name = DRV_NAME,
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},
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};
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module_platform_driver(pxa_ata_driver);
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MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>");
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MODULE_DESCRIPTION("DMA-capable driver for PATA on PXA CPU");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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MODULE_ALIAS("platform:" DRV_NAME);
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