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Convert the device tree bindings for the Altera SOCFPGA reset manager to YAML schema to allow participating in DT validation. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Cc: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220407154338.4190674-11-p.zabel@pengutronix.de
48 lines
987 B
YAML
48 lines
987 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/reset/altr,rst-mgr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Altera SOCFPGA Reset Manager
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maintainers:
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- Dinh Nguyen <dinguyen@altera.com>
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properties:
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compatible:
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oneOf:
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- description: Cyclone5/Arria5/Arria10
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const: altr,rst-mgr
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- description: Stratix10 ARM64 SoC
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items:
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- const: altr,stratix10-rst-mgr
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- const: altr,rst-mgr
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reg:
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maxItems: 1
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altr,modrst-offset:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: Offset of the first modrst register
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- altr,modrst-offset
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- '#reset-cells'
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additionalProperties: false
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examples:
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- |
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rstmgr@ffd05000 {
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compatible = "altr,rst-mgr";
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reg = <0xffd05000 0x1000>;
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altr,modrst-offset = <0x10>;
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#reset-cells = <1>;
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};
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