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This patch enables support for OSPM suspend and resume in the MIC driver. During a host suspend event, the driver performs an orderly shutdown of the cards if they are online. Upon resume, any cards that were previously online before suspend are rebooted. The driver performs an orderly shutdown of the card primarily to ensure that applications in the card are terminated and mounted devices are safely un-mounted before the card is powered down in the event of an OSPM suspend. The driver makes use of the MIC daemon to accomplish OSPM suspend and resume. The driver registers a PM notifier per MIC device. The devices get notified synchronously during PM_SUSPEND_PREPARE and PM_POST_SUSPEND phases. During the PM_SUSPEND_PREPARE phase, the driver performs one of the following three tasks. 1) If the card is 'offline', the driver sets the card to a 'suspended' state and returns. 2) If the card is 'online', the driver initiates card shutdown by setting the card state to suspending. This notifies the MIC daemon which invokes shutdown and sets card state to 'suspended'. The driver returns after the shutdown is complete. 3) If the card is already being shutdown, possibly by a host user space application, the driver sets the card state to 'suspended' and returns after the shutdown is complete. During the PM_POST_SUSPEND phase, the driver simply notifies the daemon and returns. The daemon boots those cards that were previously online during the suspend phase. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Nikhil Rao <nikhil.rao@intel.com> Signed-off-by: Harshavardhan R Kharche <harshavardhan.r.kharche@intel.com> Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: Dasaratharaman Chandramouli <dasaratharaman.chandramouli@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
52 lines
3.0 KiB
Plaintext
52 lines
3.0 KiB
Plaintext
An Intel MIC X100 device is a PCIe form factor add-in coprocessor
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card based on the Intel Many Integrated Core (MIC) architecture
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that runs a Linux OS. It is a PCIe endpoint in a platform and therefore
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implements the three required standard address spaces i.e. configuration,
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memory and I/O. The host OS loads a device driver as is typical for
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PCIe devices. The card itself runs a bootstrap after reset that
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transfers control to the card OS downloaded from the host driver. The
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host driver supports OSPM suspend and resume operations. It shuts down
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the card during suspend and reboots the card OS during resume.
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The card OS as shipped by Intel is a Linux kernel with modifications
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for the X100 devices.
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Since it is a PCIe card, it does not have the ability to host hardware
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devices for networking, storage and console. We provide these devices
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on X100 coprocessors thus enabling a self-bootable equivalent environment
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for applications. A key benefit of our solution is that it leverages
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the standard virtio framework for network, disk and console devices,
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though in our case the virtio framework is used across a PCIe bus.
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Here is a block diagram of the various components described above. The
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virtio backends are situated on the host rather than the card given better
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single threaded performance for the host compared to MIC, the ability of
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the host to initiate DMA's to/from the card using the MIC DMA engine and
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the fact that the virtio block storage backend can only be on the host.
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+----------+ | +----------+
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| Card OS | | | Host OS |
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+----------+ | +----------+
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+-------+ +--------+ +------+ | +---------+ +--------+ +--------+
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| Virtio| |Virtio | |Virtio| | |Virtio | |Virtio | |Virtio |
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| Net | |Console | |Block | | |Net | |Console | |Block |
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| Driver| |Driver | |Driver| | |backend | |backend | |backend |
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+-------+ +--------+ +------+ | +---------+ +--------+ +--------+
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| | | | | | |
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| | | |User | | |
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| | | |------|------------|---------|-------
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+-------------------+ |Kernel +--------------------------+
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| | | Virtio over PCIe IOCTLs |
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| | +--------------------------+
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+--------------+ | |
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|Intel MIC | | +---------------+
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|Card Driver | | |Intel MIC |
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+--------------+ | |Host Driver |
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| | +---------------+
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+-------------------------------------------------------------+
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| PCIe Bus |
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+-------------------------------------------------------------+
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