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The MT7530 switch from the MT7621 SoC has 2 ports which can be set up as internal: port 5 and 6. Arınç reports that the GMAC1 attached to port 5 receives corrupted frames, unless port 6 (attached to GMAC0) has been brought up by the driver. This is true regardless of whether port 5 is used as a user port or as a CPU port (carrying DSA tags). Offline debugging (blind for me) which began in the linked thread showed experimentally that the configuration done by the driver for port 6 contains a step which is needed by port 5 as well - the write to CORE_GSWPLL_GRP2 (note that I've no idea as to what it does, apart from the comment "Set core clock into 500Mhz"). Prints put by Arınç show that the reset value of CORE_GSWPLL_GRP2 is RG_GSWPLL_POSDIV_500M(1) | RG_GSWPLL_FBKDIV_500M(40) (0x128), both on the MCM MT7530 from the MT7621 SoC, as well as on the standalone MT7530 from MT7623NI Bananapi BPI-R2. Apparently, port 5 on the standalone MT7530 can work under both values of the register, while on the MT7621 SoC it cannot. The call path that triggers the register write is: mt753x_phylink_mac_config() for port 6 -> mt753x_pad_setup() -> mt7530_pad_clk_setup() so this fully explains the behavior noticed by Arınç, that bringing port 6 up is necessary. The simplest fix for the problem is to extract the register writes which are needed for both port 5 and 6 into a common mt7530_pll_setup() function, which is called at mt7530_setup() time, immediately after switch reset. We can argue that this mirrors the code layout introduced in mt7531_setup() by commit |
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b53 | ||
hirschmann | ||
microchip | ||
mv88e6xxx | ||
ocelot | ||
qca | ||
realtek | ||
sja1105 | ||
xrs700x | ||
bcm_sf2_cfp.c | ||
bcm_sf2_regs.h | ||
bcm_sf2.c | ||
bcm_sf2.h | ||
dsa_loop_bdinfo.c | ||
dsa_loop.c | ||
dsa_loop.h | ||
Kconfig | ||
lan9303_i2c.c | ||
lan9303_mdio.c | ||
lan9303-core.c | ||
lan9303.h | ||
lantiq_gswip.c | ||
lantiq_pce.h | ||
Makefile | ||
mt7530.c | ||
mt7530.h | ||
mv88e6060.c | ||
mv88e6060.h | ||
rzn1_a5psw.c | ||
rzn1_a5psw.h | ||
vitesse-vsc73xx-core.c | ||
vitesse-vsc73xx-platform.c | ||
vitesse-vsc73xx-spi.c | ||
vitesse-vsc73xx.h |