mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-11-16 00:34:20 +08:00
2b11ea5bf2
This will allow to have static Device mapping and DT probe mapping for the System Controller. Temporary keep the call to ioremap_registers() until we have the binding for the SDRAM/DDR Controller. Temporary keep the main clock hardcoded to 12MHz until we have the binding for the PMC. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
96 lines
3.1 KiB
C
96 lines
3.1 KiB
C
/*
|
|
* linux/arch/arm/mach-at91/generic.h
|
|
*
|
|
* Copyright (C) 2005 David Brownell
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
* published by the Free Software Foundation.
|
|
*/
|
|
|
|
#include <linux/clkdev.h>
|
|
#include <linux/of.h>
|
|
|
|
/* Map io */
|
|
extern void __init at91_map_io(void);
|
|
extern void __init at91_init_sram(int bank, unsigned long base,
|
|
unsigned int length);
|
|
|
|
/* Processors */
|
|
extern void __init at91rm9200_set_type(int type);
|
|
extern void __init at91_initialize(unsigned long main_clock);
|
|
extern void __init at91x40_initialize(unsigned long main_clock);
|
|
extern void __init at91_dt_initialize(void);
|
|
|
|
/* Interrupts */
|
|
extern void __init at91_init_irq_default(void);
|
|
extern void __init at91_init_interrupts(unsigned int priority[]);
|
|
extern void __init at91x40_init_interrupts(unsigned int priority[]);
|
|
extern void __init at91_aic_init(unsigned int priority[]);
|
|
extern int __init at91_aic_of_init(struct device_node *node,
|
|
struct device_node *parent);
|
|
|
|
|
|
/* Timer */
|
|
struct sys_timer;
|
|
extern void at91rm9200_ioremap_st(u32 addr);
|
|
extern struct sys_timer at91rm9200_timer;
|
|
extern void at91sam926x_ioremap_pit(u32 addr);
|
|
extern struct sys_timer at91sam926x_timer;
|
|
extern struct sys_timer at91x40_timer;
|
|
|
|
/* Clocks */
|
|
/*
|
|
* function to specify the clock of the default console. As we do not
|
|
* use the device/driver bus, the dev_name is not intialize. So we need
|
|
* to link the clock to a specific con_id only "usart"
|
|
*/
|
|
extern void __init at91rm9200_set_console_clock(int id);
|
|
extern void __init at91sam9260_set_console_clock(int id);
|
|
extern void __init at91sam9261_set_console_clock(int id);
|
|
extern void __init at91sam9263_set_console_clock(int id);
|
|
extern void __init at91sam9rl_set_console_clock(int id);
|
|
extern void __init at91sam9g45_set_console_clock(int id);
|
|
#ifdef CONFIG_AT91_PMC_UNIT
|
|
extern int __init at91_clock_init(unsigned long main_clock);
|
|
#else
|
|
static int inline at91_clock_init(unsigned long main_clock) { return 0; }
|
|
#endif
|
|
struct device;
|
|
|
|
/* Power Management */
|
|
extern void at91_irq_suspend(void);
|
|
extern void at91_irq_resume(void);
|
|
|
|
/* idle */
|
|
extern void at91sam9_idle(void);
|
|
|
|
/* reset */
|
|
extern void at91_ioremap_rstc(u32 base_addr);
|
|
extern void at91sam9_alt_restart(char, const char *);
|
|
extern void at91sam9g45_restart(char, const char *);
|
|
|
|
/* shutdown */
|
|
extern void at91_ioremap_shdwc(u32 base_addr);
|
|
|
|
/* Matrix */
|
|
extern void at91_ioremap_matrix(u32 base_addr);
|
|
|
|
/* Ram Controler */
|
|
extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
|
|
|
|
/* GPIO */
|
|
#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
|
|
#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
|
|
|
|
struct at91_gpio_bank {
|
|
unsigned short id; /* peripheral ID */
|
|
unsigned long regbase; /* offset from system peripheral base */
|
|
};
|
|
extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
|
|
extern void __init at91_gpio_irq_setup(void);
|
|
extern int __init at91_gpio_of_irq_setup(struct device_node *node,
|
|
struct device_node *parent);
|
|
|
|
extern int at91_extern_irq;
|