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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 59 temple place suite 330 boston ma 02111 1307 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1334 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
231 lines
5.3 KiB
C
231 lines
5.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Integrator/AP timer driver
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* Copyright (C) 2000-2003 Deep Blue Solutions Ltd
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* Copyright (c) 2014, Linaro Limited
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*/
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#include <linux/clk.h>
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#include <linux/clocksource.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/sched_clock.h>
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#include "timer-sp.h"
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static void __iomem * sched_clk_base;
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static u64 notrace integrator_read_sched_clock(void)
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{
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return -readl(sched_clk_base + TIMER_VALUE);
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}
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static int __init integrator_clocksource_init(unsigned long inrate,
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void __iomem *base)
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{
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u32 ctrl = TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC;
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unsigned long rate = inrate;
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int ret;
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if (rate >= 1500000) {
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rate /= 16;
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ctrl |= TIMER_CTRL_DIV16;
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}
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writel(0xffff, base + TIMER_LOAD);
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writel(ctrl, base + TIMER_CTRL);
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ret = clocksource_mmio_init(base + TIMER_VALUE, "timer2",
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rate, 200, 16, clocksource_mmio_readl_down);
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if (ret)
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return ret;
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sched_clk_base = base;
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sched_clock_register(integrator_read_sched_clock, 16, rate);
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return 0;
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}
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static unsigned long timer_reload;
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static void __iomem * clkevt_base;
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = dev_id;
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/* clear the interrupt */
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writel(1, clkevt_base + TIMER_INTCLR);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static int clkevt_shutdown(struct clock_event_device *evt)
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{
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u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
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/* Disable timer */
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writel(ctrl, clkevt_base + TIMER_CTRL);
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return 0;
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}
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static int clkevt_set_oneshot(struct clock_event_device *evt)
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{
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u32 ctrl = readl(clkevt_base + TIMER_CTRL) &
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~(TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC);
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/* Leave the timer disabled, .set_next_event will enable it */
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writel(ctrl, clkevt_base + TIMER_CTRL);
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return 0;
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}
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static int clkevt_set_periodic(struct clock_event_device *evt)
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{
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u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
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/* Disable timer */
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writel(ctrl, clkevt_base + TIMER_CTRL);
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/* Enable the timer and start the periodic tick */
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writel(timer_reload, clkevt_base + TIMER_LOAD);
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ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
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writel(ctrl, clkevt_base + TIMER_CTRL);
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return 0;
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}
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static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
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{
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unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
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writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
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writel(next, clkevt_base + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
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return 0;
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}
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static struct clock_event_device integrator_clockevent = {
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.name = "timer1",
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.features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT,
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.set_state_shutdown = clkevt_shutdown,
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.set_state_periodic = clkevt_set_periodic,
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.set_state_oneshot = clkevt_set_oneshot,
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.tick_resume = clkevt_shutdown,
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.set_next_event = clkevt_set_next_event,
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.rating = 300,
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};
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static struct irqaction integrator_timer_irq = {
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.name = "timer",
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.flags = IRQF_TIMER | IRQF_IRQPOLL,
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.handler = integrator_timer_interrupt,
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.dev_id = &integrator_clockevent,
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};
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static int integrator_clockevent_init(unsigned long inrate,
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void __iomem *base, int irq)
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{
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unsigned long rate = inrate;
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unsigned int ctrl = 0;
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int ret;
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clkevt_base = base;
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/* Calculate and program a divisor */
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if (rate > 0x100000 * HZ) {
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rate /= 256;
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ctrl |= TIMER_CTRL_DIV256;
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} else if (rate > 0x10000 * HZ) {
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rate /= 16;
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ctrl |= TIMER_CTRL_DIV16;
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}
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timer_reload = rate / HZ;
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writel(ctrl, clkevt_base + TIMER_CTRL);
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ret = setup_irq(irq, &integrator_timer_irq);
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if (ret)
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return ret;
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clockevents_config_and_register(&integrator_clockevent,
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rate,
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1,
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0xffffU);
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return 0;
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}
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static int __init integrator_ap_timer_init_of(struct device_node *node)
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{
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const char *path;
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void __iomem *base;
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int err;
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int irq;
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struct clk *clk;
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unsigned long rate;
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struct device_node *alias_node;
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base = of_io_request_and_map(node, 0, "integrator-timer");
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if (IS_ERR(base))
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return PTR_ERR(base);
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clk = of_clk_get(node, 0);
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if (IS_ERR(clk)) {
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pr_err("No clock for %pOFn\n", node);
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return PTR_ERR(clk);
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}
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clk_prepare_enable(clk);
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rate = clk_get_rate(clk);
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writel(0, base + TIMER_CTRL);
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err = of_property_read_string(of_aliases,
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"arm,timer-primary", &path);
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if (err) {
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pr_warn("Failed to read property\n");
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return err;
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}
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alias_node = of_find_node_by_path(path);
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/*
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* The pointer is used as an identifier not as a pointer, we
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* can drop the refcount on the of__node immediately after
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* getting it.
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*/
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of_node_put(alias_node);
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if (node == alias_node)
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/* The primary timer lacks IRQ, use as clocksource */
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return integrator_clocksource_init(rate, base);
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err = of_property_read_string(of_aliases,
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"arm,timer-secondary", &path);
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if (err) {
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pr_warn("Failed to read property\n");
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return err;
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}
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alias_node = of_find_node_by_path(path);
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of_node_put(alias_node);
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if (node == alias_node) {
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/* The secondary timer will drive the clock event */
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irq = irq_of_parse_and_map(node, 0);
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return integrator_clockevent_init(rate, base, irq);
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}
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pr_info("Timer @%p unused\n", base);
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clk_disable_unprepare(clk);
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return 0;
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}
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TIMER_OF_DECLARE(integrator_ap_timer, "arm,integrator-timer",
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integrator_ap_timer_init_of);
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