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b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
243 lines
7.9 KiB
C
243 lines
7.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2005 Silicon Graphics, Inc.
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*/
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#ifndef IA64_SN_IOC3_H
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#define IA64_SN_IOC3_H
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/* serial port register map */
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struct ioc3_serialregs {
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uint32_t sscr;
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uint32_t stpir;
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uint32_t stcir;
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uint32_t srpir;
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uint32_t srcir;
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uint32_t srtr;
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uint32_t shadow;
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};
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/* SUPERIO uart register map */
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struct ioc3_uartregs {
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char iu_lcr;
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union {
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char iir; /* read only */
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char fcr; /* write only */
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} u3;
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union {
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char ier; /* DLAB == 0 */
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char dlm; /* DLAB == 1 */
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} u2;
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union {
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char rbr; /* read only, DLAB == 0 */
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char thr; /* write only, DLAB == 0 */
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char dll; /* DLAB == 1 */
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} u1;
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char iu_scr;
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char iu_msr;
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char iu_lsr;
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char iu_mcr;
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};
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#define iu_rbr u1.rbr
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#define iu_thr u1.thr
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#define iu_dll u1.dll
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#define iu_ier u2.ier
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#define iu_dlm u2.dlm
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#define iu_iir u3.iir
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#define iu_fcr u3.fcr
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struct ioc3_sioregs {
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char fill[0x170];
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struct ioc3_uartregs uartb;
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struct ioc3_uartregs uarta;
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};
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/* PCI IO/mem space register map */
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struct ioc3 {
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uint32_t pci_id;
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uint32_t pci_scr;
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uint32_t pci_rev;
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uint32_t pci_lat;
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uint32_t pci_addr;
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uint32_t pci_err_addr_l;
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uint32_t pci_err_addr_h;
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uint32_t sio_ir;
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/* these registers are read-only for general kernel code. To
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* modify them use the functions in ioc3.c
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*/
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uint32_t sio_ies;
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uint32_t sio_iec;
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uint32_t sio_cr;
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uint32_t int_out;
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uint32_t mcr;
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uint32_t gpcr_s;
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uint32_t gpcr_c;
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uint32_t gpdr;
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uint32_t gppr[9];
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char fill[0x4c];
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/* serial port registers */
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uint32_t sbbr_h;
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uint32_t sbbr_l;
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struct ioc3_serialregs port_a;
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struct ioc3_serialregs port_b;
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char fill1[0x1ff10];
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/* superio registers */
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struct ioc3_sioregs sregs;
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};
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/* These don't exist on the ioc3 serial card... */
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#define eier fill1[8]
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#define eisr fill1[4]
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#define PCI_LAT 0xc /* Latency Timer */
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#define PCI_SCR_DROP_MODE_EN 0x00008000 /* drop pios on parity err */
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#define UARTA_BASE 0x178
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#define UARTB_BASE 0x170
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/* bitmasks for serial RX status byte */
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#define RXSB_OVERRUN 0x01 /* char(s) lost */
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#define RXSB_PAR_ERR 0x02 /* parity error */
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#define RXSB_FRAME_ERR 0x04 /* framing error */
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#define RXSB_BREAK 0x08 /* break character */
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#define RXSB_CTS 0x10 /* state of CTS */
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#define RXSB_DCD 0x20 /* state of DCD */
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#define RXSB_MODEM_VALID 0x40 /* DCD, CTS and OVERRUN are valid */
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#define RXSB_DATA_VALID 0x80 /* FRAME_ERR PAR_ERR & BREAK valid */
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/* bitmasks for serial TX control byte */
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#define TXCB_INT_WHEN_DONE 0x20 /* interrupt after this byte is sent */
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#define TXCB_INVALID 0x00 /* byte is invalid */
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#define TXCB_VALID 0x40 /* byte is valid */
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#define TXCB_MCR 0x80 /* data<7:0> to modem cntrl register */
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#define TXCB_DELAY 0xc0 /* delay data<7:0> mSec */
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/* bitmasks for SBBR_L */
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#define SBBR_L_SIZE 0x00000001 /* 0 1KB rings, 1 4KB rings */
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/* bitmasks for SSCR_<A:B> */
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#define SSCR_RX_THRESHOLD 0x000001ff /* hiwater mark */
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#define SSCR_TX_TIMER_BUSY 0x00010000 /* TX timer in progress */
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#define SSCR_HFC_EN 0x00020000 /* h/w flow cntrl enabled */
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#define SSCR_RX_RING_DCD 0x00040000 /* postRX record on delta-DCD */
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#define SSCR_RX_RING_CTS 0x00080000 /* postRX record on delta-CTS */
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#define SSCR_HIGH_SPD 0x00100000 /* 4X speed */
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#define SSCR_DIAG 0x00200000 /* bypass clock divider */
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#define SSCR_RX_DRAIN 0x08000000 /* drain RX buffer to memory */
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#define SSCR_DMA_EN 0x10000000 /* enable ring buffer DMA */
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#define SSCR_DMA_PAUSE 0x20000000 /* pause DMA */
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#define SSCR_PAUSE_STATE 0x40000000 /* set when PAUSE takes effect*/
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#define SSCR_RESET 0x80000000 /* reset DMA channels */
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/* all producer/consumer pointers are the same bitfield */
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#define PROD_CONS_PTR_4K 0x00000ff8 /* for 4K buffers */
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#define PROD_CONS_PTR_1K 0x000003f8 /* for 1K buffers */
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#define PROD_CONS_PTR_OFF 3
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/* bitmasks for SRCIR_<A:B> */
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#define SRCIR_ARM 0x80000000 /* arm RX timer */
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/* bitmasks for SHADOW_<A:B> */
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#define SHADOW_DR 0x00000001 /* data ready */
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#define SHADOW_OE 0x00000002 /* overrun error */
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#define SHADOW_PE 0x00000004 /* parity error */
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#define SHADOW_FE 0x00000008 /* framing error */
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#define SHADOW_BI 0x00000010 /* break interrupt */
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#define SHADOW_THRE 0x00000020 /* transmit holding reg empty */
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#define SHADOW_TEMT 0x00000040 /* transmit shift reg empty */
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#define SHADOW_RFCE 0x00000080 /* char in RX fifo has error */
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#define SHADOW_DCTS 0x00010000 /* delta clear to send */
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#define SHADOW_DDCD 0x00080000 /* delta data carrier detect */
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#define SHADOW_CTS 0x00100000 /* clear to send */
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#define SHADOW_DCD 0x00800000 /* data carrier detect */
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#define SHADOW_DTR 0x01000000 /* data terminal ready */
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#define SHADOW_RTS 0x02000000 /* request to send */
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#define SHADOW_OUT1 0x04000000 /* 16550 OUT1 bit */
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#define SHADOW_OUT2 0x08000000 /* 16550 OUT2 bit */
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#define SHADOW_LOOP 0x10000000 /* loopback enabled */
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/* bitmasks for SRTR_<A:B> */
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#define SRTR_CNT 0x00000fff /* reload value for RX timer */
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#define SRTR_CNT_VAL 0x0fff0000 /* current value of RX timer */
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#define SRTR_CNT_VAL_SHIFT 16
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#define SRTR_HZ 16000 /* SRTR clock frequency */
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/* bitmasks for SIO_IR, SIO_IEC and SIO_IES */
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#define SIO_IR_SA_TX_MT 0x00000001 /* Serial port A TX empty */
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#define SIO_IR_SA_RX_FULL 0x00000002 /* port A RX buf full */
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#define SIO_IR_SA_RX_HIGH 0x00000004 /* port A RX hiwat */
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#define SIO_IR_SA_RX_TIMER 0x00000008 /* port A RX timeout */
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#define SIO_IR_SA_DELTA_DCD 0x00000010 /* port A delta DCD */
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#define SIO_IR_SA_DELTA_CTS 0x00000020 /* port A delta CTS */
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#define SIO_IR_SA_INT 0x00000040 /* port A pass-thru intr */
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#define SIO_IR_SA_TX_EXPLICIT 0x00000080 /* port A explicit TX thru */
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#define SIO_IR_SA_MEMERR 0x00000100 /* port A PCI error */
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#define SIO_IR_SB_TX_MT 0x00000200
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#define SIO_IR_SB_RX_FULL 0x00000400
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#define SIO_IR_SB_RX_HIGH 0x00000800
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#define SIO_IR_SB_RX_TIMER 0x00001000
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#define SIO_IR_SB_DELTA_DCD 0x00002000
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#define SIO_IR_SB_DELTA_CTS 0x00004000
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#define SIO_IR_SB_INT 0x00008000
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#define SIO_IR_SB_TX_EXPLICIT 0x00010000
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#define SIO_IR_SB_MEMERR 0x00020000
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#define SIO_IR_PP_INT 0x00040000 /* P port pass-thru intr */
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#define SIO_IR_PP_INTA 0x00080000 /* PP context A thru */
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#define SIO_IR_PP_INTB 0x00100000 /* PP context B thru */
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#define SIO_IR_PP_MEMERR 0x00200000 /* PP PCI error */
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#define SIO_IR_KBD_INT 0x00400000 /* kbd/mouse intr */
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#define SIO_IR_RT_INT 0x08000000 /* RT output pulse */
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#define SIO_IR_GEN_INT1 0x10000000 /* RT input pulse */
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#define SIO_IR_GEN_INT_SHIFT 28
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/* per device interrupt masks */
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#define SIO_IR_SA (SIO_IR_SA_TX_MT | \
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SIO_IR_SA_RX_FULL | \
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SIO_IR_SA_RX_HIGH | \
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SIO_IR_SA_RX_TIMER | \
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SIO_IR_SA_DELTA_DCD | \
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SIO_IR_SA_DELTA_CTS | \
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SIO_IR_SA_INT | \
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SIO_IR_SA_TX_EXPLICIT | \
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SIO_IR_SA_MEMERR)
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#define SIO_IR_SB (SIO_IR_SB_TX_MT | \
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SIO_IR_SB_RX_FULL | \
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SIO_IR_SB_RX_HIGH | \
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SIO_IR_SB_RX_TIMER | \
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SIO_IR_SB_DELTA_DCD | \
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SIO_IR_SB_DELTA_CTS | \
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SIO_IR_SB_INT | \
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SIO_IR_SB_TX_EXPLICIT | \
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SIO_IR_SB_MEMERR)
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#define SIO_IR_PP (SIO_IR_PP_INT | SIO_IR_PP_INTA | \
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SIO_IR_PP_INTB | SIO_IR_PP_MEMERR)
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#define SIO_IR_RT (SIO_IR_RT_INT | SIO_IR_GEN_INT1)
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/* bitmasks for SIO_CR */
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#define SIO_CR_CMD_PULSE_SHIFT 15
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#define SIO_CR_SER_A_BASE_SHIFT 1
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#define SIO_CR_SER_B_BASE_SHIFT 8
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#define SIO_CR_ARB_DIAG 0x00380000 /* cur !enet PCI requet (ro) */
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#define SIO_CR_ARB_DIAG_TXA 0x00000000
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#define SIO_CR_ARB_DIAG_RXA 0x00080000
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#define SIO_CR_ARB_DIAG_TXB 0x00100000
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#define SIO_CR_ARB_DIAG_RXB 0x00180000
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#define SIO_CR_ARB_DIAG_PP 0x00200000
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#define SIO_CR_ARB_DIAG_IDLE 0x00400000 /* 0 -> active request (ro) */
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/* defs for some of the generic I/O pins */
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#define GPCR_PHY_RESET 0x20 /* pin is output to PHY reset */
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#define GPCR_UARTB_MODESEL 0x40 /* pin is output to port B mode sel */
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#define GPCR_UARTA_MODESEL 0x80 /* pin is output to port A mode sel */
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#define GPPR_PHY_RESET_PIN 5 /* GIO pin controlling phy reset */
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#define GPPR_UARTB_MODESEL_PIN 6 /* GIO pin cntrling uartb modeselect */
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#define GPPR_UARTA_MODESEL_PIN 7 /* GIO pin cntrling uarta modeselect */
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#endif /* IA64_SN_IOC3_H */
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