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linux/drivers/clk/sunxi-ng
History
Frank Oltmanns 69f16d9b78 clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI 
When the Allwinner A64's TCON0 searches the ideal rate for the connected
panel, it may happen that it requests a rate from its parent PLL-MIPI
which PLL-MIPI does not support.

This happens for example on the Olimex TERES-I laptop where TCON0
requests PLL-MIPI to change to a rate of several GHz which causes the
panel to stay blank. It also happens on the pinephone where a rate of
less than 500 MHz is requested which causes instabilities on some
phones.

Set the minimum and maximum rate of Allwinner A64's PLL-MIPI according
to the Allwinner User Manual.

Fixes: ca1170b699 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux")
Reported-by: Diego Roversi <diegor@tiscali.it>
Closes: https://groups.google.com/g/linux-sunxi/c/Rh-Uqqa66bw
Tested-by: Diego Roversi <diegor@tiscali.it>
Cc: stable@vger.kernel.org
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-2-46fc80c83637@oltmanns.dev
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2024-04-15 23:21:56 +02:00
..
ccu_common.c clk: sunxi-ng: common: Support minimum and maximum rate 2024-04-15 23:21:45 +02:00
ccu_common.h clk: sunxi-ng: common: Support minimum and maximum rate 2024-04-15 23:21:45 +02:00
ccu_div.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_div.h clk: sunxi-ng: div: Support finding closest rate 2023-08-09 23:33:59 +08:00
ccu_frac.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_frac.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu_gate.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_gate.h clk: sunxi-ng: gate: Add macros for gates with fixed dividers 2021-11-23 10:29:05 +01:00
ccu_mmc_timing.c clk: sunxi-ng: Modify mismatched function name 2023-07-31 00:52:36 +02:00
ccu_mp.c clk: sunxi-ng: Avoid computing the rate twice 2023-01-08 21:55:17 +01:00
ccu_mp.h clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw 2021-11-23 10:29:05 +01:00
ccu_mult.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_mult.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
ccu_mux.c clk: sunxi-ng: mux: Support finding closest rate 2023-08-09 23:33:59 +08:00
ccu_mux.h clk: sunxi-ng: mux: Support finding closest rate 2023-08-09 23:33:59 +08:00
ccu_nk.c clk: sunxi-ng: Avoid computing the rate twice 2023-01-08 21:55:17 +01:00
ccu_nk.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu_nkm.c clk: sunxi-ng: nkm: remove redundant initialization of tmp_parent 2023-11-18 23:20:34 +01:00
ccu_nkm.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu_nkmp.c clk: sunxi-ng: Avoid computing the rate twice 2023-01-08 21:55:17 +01:00
ccu_nkmp.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu_nm.c clk: sunxi-ng: nm: Support finding closest rate 2023-08-09 23:33:58 +08:00
ccu_nm.h clk: sunxi-ng: nm: Support finding closest rate 2023-08-09 23:33:58 +08:00
ccu_phase.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_phase.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu_reset.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_reset.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu_sdm.c clk: sunxi-ng: Export symbols used by CCU drivers 2021-11-22 10:02:21 +01:00
ccu_sdm.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 2019-06-05 17:36:37 +02:00
ccu-sun4i-a10.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun4i-a10.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun5i.c clk: sunxi-ng: Unregister clocks/resets when unbinding 2021-09-13 09:03:20 +02:00
ccu-sun5i.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun6i-a31.c clk: sunxi-ng: Convert early providers to platform drivers 2021-11-23 10:29:05 +01:00
ccu-sun6i-a31.h clk: sunxi: a31: Export the MIPI PLL 2020-01-04 09:45:09 +01:00
ccu-sun6i-rtc.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun6i-rtc.h clk: sunxi-ng: Add support for the sun6i RTC clocks 2022-03-23 19:58:38 +01:00
ccu-sun8i-a23-a33.h clk: sunxi: a23/a33: Export the MIPI PLL 2020-01-04 09:45:19 +01:00
ccu-sun8i-a23.c clk: sunxi-ng: Convert early providers to platform drivers 2021-11-23 10:29:05 +01:00
ccu-sun8i-a33.c clk: sunxi-ng: Convert early providers to platform drivers 2021-11-23 10:29:05 +01:00
ccu-sun8i-a83t.c clk: sunxi-ng: Allow drivers to be built as modules 2021-11-22 10:02:21 +01:00
ccu-sun8i-a83t.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun8i-de2.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun8i-de2.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun8i-h3.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun8i-h3.h dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq 2021-11-23 11:29:35 +01:00
ccu-sun8i-r40.c clk: sunxi-ng: Allow drivers to be built as modules 2021-11-22 10:02:21 +01:00
ccu-sun8i-r40.h clk: sunxi-ng: r40: Export MBUS clock 2020-01-03 10:37:14 +01:00
ccu-sun8i-r.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun8i-r.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun8i-v3s.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun8i-v3s.h clk: sunxi-ng: v3s: Correct the header guard of ccu-sun8i-v3s.h 2022-11-16 19:45:53 +01:00
ccu-sun9i-a80-de.c clk: sunxi-ng: ccu-sun9i-a80-de: Use dev_err_probe() helper 2022-09-08 21:59:01 +02:00
ccu-sun9i-a80-de.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun9i-a80-usb.c clk: sunxi-ng: ccu-sun9i-a80-usb: Use dev_err_probe() helper 2022-09-08 21:59:01 +02:00
ccu-sun9i-a80-usb.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun9i-a80.c clk: sunxi-ng: Allow drivers to be built as modules 2021-11-22 10:02:21 +01:00
ccu-sun9i-a80.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 2019-05-30 11:26:37 -07:00
ccu-sun20i-d1-r.c clk: sunxi-ng: Add support for the D1 SoC clocks 2021-11-23 10:29:05 +01:00
ccu-sun20i-d1-r.h clk: sunxi-ng: Add support for the D1 SoC clocks 2021-11-23 10:29:05 +01:00
ccu-sun20i-d1.c clk: sunxi-ng: d1: Add CAN bus gates and resets 2023-01-08 22:06:10 +01:00
ccu-sun20i-d1.h clk: sunxi-ng: d1: Add CAN bus gates and resets 2023-01-08 22:06:10 +01:00
ccu-sun50i-a64.c clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI 2024-04-15 23:21:56 +02:00
ccu-sun50i-a64.h dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq 2021-11-23 11:29:35 +01:00
ccu-sun50i-a100-r.c clk: sunxi-ng: Allow drivers to be built as modules 2021-11-22 10:02:21 +01:00
ccu-sun50i-a100-r.h clk: sunxi-ng: add support for the Allwinner A100 CCU 2020-08-25 10:52:18 +02:00
ccu-sun50i-a100.c clk: sunxi-ng: Allow drivers to be built as modules 2021-11-22 10:02:21 +01:00
ccu-sun50i-a100.h clk: sunxi-ng: add support for the Allwinner A100 CCU 2020-08-25 10:52:18 +02:00
ccu-sun50i-h6-r.c clk: Explicitly include correct DT includes 2023-07-19 13:13:16 -07:00
ccu-sun50i-h6-r.h clk: sunxi-ng: h6-r: Add RTC gate clock 2022-05-06 18:02:40 +02:00
ccu-sun50i-h6.c clk: sunxi-ng: h6: Reparent CPUX during PLL CPUX rate change 2024-04-15 23:04:22 +02:00
ccu-sun50i-h6.h clk: sunxi-ng: Use the correct style for SPDX License Identifier 2019-05-01 13:01:26 -07:00
ccu-sun50i-h616.c clk: sunxi-ng: h616: Add PLL derived 32KHz clock 2022-05-06 18:03:52 +02:00
ccu-sun50i-h616.h clk: sunxi-ng: h616: Add PLL derived 32KHz clock 2022-05-06 18:03:52 +02:00
ccu-suniv-f1c100s.c clk: sunxi-ng: f1c100s: Add IR mod clock 2022-11-16 19:49:18 +01:00
ccu-suniv-f1c100s.h clk: sunxi-ng: f1c100s: Add IR mod clock 2022-11-16 19:49:18 +01:00
Kconfig clk: sunxi-ng: d1: Allow building for R528/T113 2023-01-08 22:06:10 +01:00
Makefile clk: sunxi-ng: Add support for the sun6i RTC clocks 2022-03-23 19:58:38 +01:00