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5a843307cd
For now, remove the spinlocks that protected the GuC's statistics block and work queue; they are only accessed by code that already holds the global struct_mutex, and so are redundant (until the big struct_mutex rewrite!). The specific problem that the spinlocks caused was that if the work queue was full, the driver would try to spinwait for one jiffy, but with interrupts disabled the jiffy count would not advance, leading to a system hang. The issue was found using test case igt/gem_close_race. The new version will usleep() instead, still holding the struct_mutex but without any spinlocks. v4: Reorganize commit message (Dave Gordon) v3: Remove unnecessary whitespace churn v2: Clean up wq_lock too v1: Clean up host2guc lock as well Signed-off-by: Alex Dai <yu.dai@intel.com> Reviewed-by: Dave Gordon <david.s.gordon@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1449104189-27591-1-git-send-email-yu.dai@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
127 lines
3.9 KiB
C
127 lines
3.9 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef _INTEL_GUC_H_
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#define _INTEL_GUC_H_
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#include "intel_guc_fwif.h"
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#include "i915_guc_reg.h"
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struct i915_guc_client {
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struct drm_i915_gem_object *client_obj;
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struct intel_context *owner;
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struct intel_guc *guc;
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uint32_t priority;
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uint32_t ctx_index;
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uint32_t proc_desc_offset;
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uint32_t doorbell_offset;
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uint32_t cookie;
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uint16_t doorbell_id;
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uint16_t padding; /* Maintain alignment */
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uint32_t wq_offset;
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uint32_t wq_size;
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uint32_t wq_tail;
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/* GuC submission statistics & status */
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uint64_t submissions[I915_NUM_RINGS];
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uint32_t q_fail;
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uint32_t b_fail;
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int retcode;
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};
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enum intel_guc_fw_status {
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GUC_FIRMWARE_FAIL = -1,
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GUC_FIRMWARE_NONE = 0,
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GUC_FIRMWARE_PENDING,
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GUC_FIRMWARE_SUCCESS
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};
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/*
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* This structure encapsulates all the data needed during the process
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* of fetching, caching, and loading the firmware image into the GuC.
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*/
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struct intel_guc_fw {
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struct drm_device * guc_dev;
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const char * guc_fw_path;
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size_t guc_fw_size;
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struct drm_i915_gem_object * guc_fw_obj;
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enum intel_guc_fw_status guc_fw_fetch_status;
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enum intel_guc_fw_status guc_fw_load_status;
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uint16_t guc_fw_major_wanted;
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uint16_t guc_fw_minor_wanted;
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uint16_t guc_fw_major_found;
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uint16_t guc_fw_minor_found;
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uint32_t header_size;
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uint32_t header_offset;
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uint32_t rsa_size;
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uint32_t rsa_offset;
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uint32_t ucode_size;
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uint32_t ucode_offset;
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};
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struct intel_guc {
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struct intel_guc_fw guc_fw;
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uint32_t log_flags;
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struct drm_i915_gem_object *log_obj;
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struct drm_i915_gem_object *ctx_pool_obj;
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struct ida ctx_ids;
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struct i915_guc_client *execbuf_client;
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DECLARE_BITMAP(doorbell_bitmap, GUC_MAX_DOORBELLS);
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uint32_t db_cacheline; /* Cyclic counter mod pagesize */
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/* Action status & statistics */
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uint64_t action_count; /* Total commands issued */
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uint32_t action_cmd; /* Last command word */
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uint32_t action_status; /* Last return status */
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uint32_t action_fail; /* Total number of failures */
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int32_t action_err; /* Last error code */
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uint64_t submissions[I915_NUM_RINGS];
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uint32_t last_seqno[I915_NUM_RINGS];
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};
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/* intel_guc_loader.c */
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extern void intel_guc_ucode_init(struct drm_device *dev);
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extern int intel_guc_ucode_load(struct drm_device *dev);
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extern void intel_guc_ucode_fini(struct drm_device *dev);
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extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
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extern int intel_guc_suspend(struct drm_device *dev);
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extern int intel_guc_resume(struct drm_device *dev);
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/* i915_guc_submission.c */
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int i915_guc_submission_init(struct drm_device *dev);
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int i915_guc_submission_enable(struct drm_device *dev);
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int i915_guc_submit(struct i915_guc_client *client,
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struct drm_i915_gem_request *rq);
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void i915_guc_submission_disable(struct drm_device *dev);
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void i915_guc_submission_fini(struct drm_device *dev);
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#endif
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