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b89359bdf0
This adds very rudimentary TCON (timing controller for raw LCD displays) support to enable the bypass mode in order to use the DCU controller on Freescale/NXP Vybrid SoC's. Additionally the register clock and pixel clock has been separated, but are currently still enabled and disabled pairwise. Other than that, fixes and cleanups accross the driver. * 'for-next' of http://git.agner.ch/git/linux-drm-fsl-dcu: drm/fsl-dcu: increment version and date drm/fsl-dcu: implement lastclose callback drm/fsl-dcu: disable output polling on driver unload drm/fsl-dcu: deallocate fbdev CMA on unload drm/fsl-dcu: use variable name dev for struct drm_device drm/fsl-dcu: handle missing panel gracefully drm/fsl-dcu: detach panel on destroy drm/layerscape: reduce excessive stack usage drm/fsl-dcu: add TCON driver drm/fsl-dcu: use common clock framework for pixel clock divider drm/fsl-dcu: add extra clock for pixel clock drm/fsl-dcu: disable clock on initialization failure and remove |
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| drm | ||
| host1x | ||
| ipu-v3 | ||
| vga | ||
| Makefile | ||