Kim Phillips 26e52558ea perf/x86/amd: Fix sampling Large Increment per Cycle events ... Commit 5738891229 ("perf/x86/amd: Add support for Large Increment per Cycle Events") mistakenly zeroes the upper 16 bits of the count in set_period(). That's fine for counting with perf stat, but not sampling with perf record when only Large Increment events are being sampled. To enable sampling, we sign extend the upper 16 bits of the merged counter pair as described in the Family 17h PPRs: "Software wanting to preload a value to a merged counter pair writes the high-order 16-bit value to the low-order 16 bits of the odd counter and then writes the low-order 48-bit value to the even counter. Reading the even counter of the merged counter pair returns the full 64-bit value." Fixes: 5738891229 ("perf/x86/amd: Add support for Large Increment per Cycle Events") Signed-off-by: Kim Phillips <kim.phillips@amd.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: stable@vger.kernel.org Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537		2020-09-10 11:19:35 +02:00
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amd	perf/amd/uncore: Set all slices and threads to restore perf stat -a behaviour	2020-09-10 11:19:34 +02:00
intel	perf/x86/intel/ds: Fix x86_pmu_stop warning for large PEBS	2020-09-10 11:19:33 +02:00
zhaoxin	x86/perf: Fix a typo	2020-07-22 10:22:08 +02:00
core.c	perf/x86/amd: Fix sampling Large Increment per Cycle events	2020-09-10 11:19:35 +02:00
Kconfig	treewide: replace '---help---' in Kconfig files with 'help'	2020-06-14 01:57:21 +09:00
Makefile	perf/x86/rapl: Fix RAPL config variable bug	2020-06-02 11:52:56 +02:00
msr.c	perf/x86/msr: Add Tremont support	2020-02-11 13:17:50 +01:00
perf_event.h	perf/x86/intel: Support TopDown metrics on Ice Lake	2020-08-18 16:34:37 +02:00
probe.c	perf/x86/rapl: Make perf_probe_msr() more robust and flexible	2020-05-28 07:58:55 +02:00
probe.h	perf/x86: Add MSR probe interface	2019-06-24 19:28:31 +02:00
rapl.c	perf/x86/rapl: Add support for Intel SPR platform	2020-08-14 12:35:12 +02:00