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63b1bae940
- Drop unneeded interrupt-parent,
- Convert to new style CPG/MSSR bindings,
- Add missing power-domains and resets properties,
- Update PHY subnode:
- Add example compatible values,
- Add micrel,led-mode and reset-gpios examples.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: David S. Miller <davem@davemloft.net>
131 lines
3.6 KiB
YAML
131 lines
3.6 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/renesas,ether.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Electronics SH EtherMAC
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allOf:
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- $ref: ethernet-controller.yaml#
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maintainers:
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- Sergei Shtylyov <sergei.shtylyov@gmail.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,gether-r8a7740 # device is a part of R8A7740 SoC
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- renesas,gether-r8a77980 # device is a part of R8A77980 SoC
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- renesas,ether-r7s72100 # device is a part of R7S72100 SoC
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- renesas,ether-r7s9210 # device is a part of R7S9210 SoC
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- items:
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- enum:
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- renesas,ether-r8a7778 # device is a part of R8A7778 SoC
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- renesas,ether-r8a7779 # device is a part of R8A7779 SoC
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- enum:
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- renesas,rcar-gen1-ether # a generic R-Car Gen1 device
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- items:
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- enum:
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- renesas,ether-r8a7742 # device is a part of R8A7742 SoC
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- renesas,ether-r8a7743 # device is a part of R8A7743 SoC
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- renesas,ether-r8a7745 # device is a part of R8A7745 SoC
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- renesas,ether-r8a7790 # device is a part of R8A7790 SoC
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- renesas,ether-r8a7791 # device is a part of R8A7791 SoC
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- renesas,ether-r8a7793 # device is a part of R8A7793 SoC
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- renesas,ether-r8a7794 # device is a part of R8A7794 SoC
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- enum:
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- renesas,rcar-gen2-ether # a generic R-Car Gen2 or RZ/G1 device
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reg:
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items:
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- description: E-DMAC/feLic registers
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- description: TSU registers
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minItems: 1
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interrupts:
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maxItems: 1
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'#address-cells':
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description: number of address cells for the MDIO bus
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const: 1
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'#size-cells':
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description: number of size cells on the MDIO bus
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const: 0
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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phy-mode: true
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phy-handle: true
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renesas,no-ether-link:
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type: boolean
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description:
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specify when a board does not provide a proper Ether LINK signal
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renesas,ether-link-active-low:
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type: boolean
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description:
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specify when the Ether LINK signal is active-low instead of normal
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active-high
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patternProperties:
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"^ethernet-phy@[0-9a-f]$":
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type: object
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$ref: ethernet-phy.yaml#
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required:
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- compatible
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- reg
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- interrupts
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- phy-mode
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- phy-handle
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- '#address-cells'
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- '#size-cells'
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- clocks
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additionalProperties: false
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examples:
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# Lager board
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- |
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#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7790-sysc.h>
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#include <dt-bindings/gpio/gpio.h>
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ethernet@ee700000 {
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compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether";
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reg = <0xee700000 0x400>;
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interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 813>;
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power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
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resets = <&cpg 813>;
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phy-mode = "rmii";
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phy-handle = <&phy1>;
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renesas,ether-link-active-low;
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#address-cells = <1>;
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#size-cells = <0>;
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phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-id0022.1537",
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"ethernet-phy-ieee802.3-c22";
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reg = <1>;
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interrupt-parent = <&irqc0>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
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micrel,led-mode = <1>;
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reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>;
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};
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};
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