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8973d7b863
Add SoC specific bindings for OX810SE support. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
42 lines
1.3 KiB
Plaintext
42 lines
1.3 KiB
Plaintext
* Oxford Semiconductor OXNAS DWMAC Ethernet controller
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The device inherits all the properties of the dwmac/stmmac devices
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described in the file stmmac.txt in the current directory with the
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following changes.
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Required properties on all platforms:
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- compatible: For the OX820 SoC, it should be :
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- "oxsemi,ox820-dwmac" to select glue
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- "snps,dwmac-3.512" to select IP version.
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For the OX810SE SoC, it should be :
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- "oxsemi,ox810se-dwmac" to select glue
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- "snps,dwmac-3.512" to select IP version.
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- clocks: Should contain phandles to the following clocks
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- clock-names: Should contain the following:
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- "stmmaceth" for the host clock - see stmmac.txt
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- "gmac" for the peripheral gate clock
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- oxsemi,sys-ctrl: a phandle to the system controller syscon node
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Example :
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etha: ethernet@40400000 {
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compatible = "oxsemi,ox820-dwmac", "snps,dwmac-3.512";
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reg = <0x40400000 0x2000>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "macirq", "eth_wake_irq";
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mac-address = [000000000000]; /* Filled in by U-Boot */
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phy-mode = "rgmii";
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clocks = <&stdclk CLK_820_ETHA>, <&gmacclk>;
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clock-names = "gmac", "stmmaceth";
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resets = <&reset RESET_MAC>;
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/* Regmap for sys registers */
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oxsemi,sys-ctrl = <&sys>;
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};
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