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linux/Documentation/devicetree/bindings/interconnect/qcom,sm8550-rpmh.yaml
Abel Vesa 66773faf05 dt-bindings: interconnect: Add Qualcomm SM8550
The Qualcomm SM8550 SoC has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221202232054.2666830-2-abel.vesa@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
2022-12-29 11:36:33 +02:00

140 lines
3.3 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interconnect/qcom,sm8550-rpmh.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm RPMh Network-On-Chip Interconnect on SM8550
maintainers:
- Abel Vesa <abel.vesa@linaro.org>
- Neil Armstrong <neil.armstrong@linaro.org>
description: |
RPMh interconnect providers support system bandwidth requirements through
RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
able to communicate with the BCM through the Resource State Coordinator (RSC)
associated with each execution environment. Provider nodes must point to at
least one RPMh device child node pertaining to their RSC and each provider
can map to multiple RPMh resources.
See also:: include/dt-bindings/interconnect/qcom,sm8550-rpmh.h
properties:
compatible:
enum:
- qcom,sm8550-aggre1-noc
- qcom,sm8550-aggre2-noc
- qcom,sm8550-clk-virt
- qcom,sm8550-cnoc-main
- qcom,sm8550-config-noc
- qcom,sm8550-gem-noc
- qcom,sm8550-lpass-ag-noc
- qcom,sm8550-lpass-lpiaon-noc
- qcom,sm8550-lpass-lpicx-noc
- qcom,sm8550-mc-virt
- qcom,sm8550-mmss-noc
- qcom,sm8550-nsp-noc
- qcom,sm8550-pcie-anoc
- qcom,sm8550-system-noc
reg:
maxItems: 1
clocks:
minItems: 1
maxItems: 2
allOf:
- $ref: qcom,rpmh-common.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-clk-virt
- qcom,sm8550-mc-virt
then:
properties:
reg: false
else:
required:
- reg
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-pcie-anoc
then:
properties:
clocks:
items:
- description: aggre-NOC PCIe AXI clock
- description: cfg-NOC PCIe a-NOC AHB clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-aggre1-noc
then:
properties:
clocks:
items:
- description: aggre UFS PHY AXI clock
- description: aggre USB3 PRIM AXI clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-aggre2-noc
then:
properties:
clocks:
items:
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8550-aggre1-noc
- qcom,sm8550-aggre2-noc
- qcom,sm8550-pcie-anoc
then:
required:
- clocks
else:
properties:
clocks: false
required:
- compatible
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
clk_virt: interconnect-0 {
compatible = "qcom,sm8550-clk-virt";
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
};
aggre1_noc: interconnect@16e0000 {
compatible = "qcom,sm8550-aggre1-noc";
reg = <0x016e0000 0x14400>;
#interconnect-cells = <2>;
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
qcom,bcm-voters = <&apps_bcm_voter>;
};