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7c4b1ab9f1
When DCT QPs work in RoCE LAG mode: 1. DCT creation is allowed only when it is supported 2. The "port" of a DCT QP is assigned in a round-robin way Link: https://lore.kernel.org/r/20200818115245.700581-3-leon@kernel.org Signed-off-by: Mark Zhang <markz@mellanox.com> Reviewed-by: Maor Gottlieb <maorg@mellanox.com> Signed-off-by: Leon Romanovsky <leonro@mellanox.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> |
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| bnxt_re | ||
| cxgb4 | ||
| efa | ||
| hfi1 | ||
| hns | ||
| i40iw | ||
| mlx4 | ||
| mlx5 | ||
| mthca | ||
| ocrdma | ||
| qedr | ||
| qib | ||
| usnic | ||
| vmw_pvrdma | ||
| Makefile | ||