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7562539e15
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230711034846.69437-1-frank.li@vivo.com Signed-off-by: Mark Brown <broonie@kernel.org>
304 lines
8.2 KiB
C
304 lines
8.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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// linux/sound/bcm/bcm63xx-i2s-whistler.c
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// BCM63xx whistler i2s driver
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// Copyright (c) 2020 Broadcom Corporation
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// Author: Kevin-Ke Li <kevin-ke.li@broadcom.com>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "bcm63xx-i2s.h"
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#define DRV_NAME "brcm-i2s"
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static bool brcm_i2s_wr_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case I2S_TX_CFG ... I2S_TX_DESC_IFF_LEN:
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case I2S_TX_CFG_2 ... I2S_RX_DESC_IFF_LEN:
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case I2S_RX_CFG_2 ... I2S_REG_MAX:
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return true;
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default:
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return false;
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}
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}
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static bool brcm_i2s_rd_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case I2S_TX_CFG ... I2S_REG_MAX:
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return true;
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default:
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return false;
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}
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}
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static bool brcm_i2s_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case I2S_TX_CFG:
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case I2S_TX_IRQ_CTL:
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case I2S_TX_DESC_IFF_ADDR:
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case I2S_TX_DESC_IFF_LEN:
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case I2S_TX_DESC_OFF_ADDR:
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case I2S_TX_DESC_OFF_LEN:
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case I2S_TX_CFG_2:
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case I2S_RX_CFG:
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case I2S_RX_IRQ_CTL:
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case I2S_RX_DESC_OFF_ADDR:
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case I2S_RX_DESC_OFF_LEN:
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case I2S_RX_DESC_IFF_LEN:
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case I2S_RX_DESC_IFF_ADDR:
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case I2S_RX_CFG_2:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config brcm_i2s_regmap_config = {
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.reg_bits = 32,
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.reg_stride = 4,
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.val_bits = 32,
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.max_register = I2S_REG_MAX,
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.writeable_reg = brcm_i2s_wr_reg,
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.readable_reg = brcm_i2s_rd_reg,
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.volatile_reg = brcm_i2s_volatile_reg,
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.cache_type = REGCACHE_FLAT,
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};
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static int bcm63xx_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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int ret = 0;
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struct bcm_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai);
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ret = clk_set_rate(i2s_priv->i2s_clk, params_rate(params));
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if (ret < 0)
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dev_err(i2s_priv->dev,
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"Can't set sample rate, err: %d\n", ret);
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return ret;
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}
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static int bcm63xx_i2s_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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unsigned int slavemode;
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struct bcm_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai);
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struct regmap *regmap_i2s = i2s_priv->regmap_i2s;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_update_bits(regmap_i2s, I2S_TX_CFG,
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I2S_TX_OUT_R | I2S_TX_DATA_ALIGNMENT |
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I2S_TX_DATA_ENABLE | I2S_TX_CLOCK_ENABLE,
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I2S_TX_OUT_R | I2S_TX_DATA_ALIGNMENT |
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I2S_TX_DATA_ENABLE | I2S_TX_CLOCK_ENABLE);
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regmap_write(regmap_i2s, I2S_TX_IRQ_CTL, 0);
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regmap_write(regmap_i2s, I2S_TX_IRQ_IFF_THLD, 0);
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regmap_write(regmap_i2s, I2S_TX_IRQ_OFF_THLD, 1);
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/* TX and RX block each have an independent bit to indicate
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* if it is generating the clock for the I2S bus. The bus
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* clocks need to be generated from either the TX or RX block,
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* but not both
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*/
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regmap_read(regmap_i2s, I2S_RX_CFG_2, &slavemode);
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if (slavemode & I2S_RX_SLAVE_MODE_MASK)
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regmap_update_bits(regmap_i2s, I2S_TX_CFG_2,
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I2S_TX_SLAVE_MODE_MASK,
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I2S_TX_MASTER_MODE);
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else
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regmap_update_bits(regmap_i2s, I2S_TX_CFG_2,
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I2S_TX_SLAVE_MODE_MASK,
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I2S_TX_SLAVE_MODE);
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} else {
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regmap_update_bits(regmap_i2s, I2S_RX_CFG,
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I2S_RX_IN_R | I2S_RX_DATA_ALIGNMENT |
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I2S_RX_CLOCK_ENABLE,
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I2S_RX_IN_R | I2S_RX_DATA_ALIGNMENT |
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I2S_RX_CLOCK_ENABLE);
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regmap_write(regmap_i2s, I2S_RX_IRQ_CTL, 0);
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regmap_write(regmap_i2s, I2S_RX_IRQ_IFF_THLD, 0);
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regmap_write(regmap_i2s, I2S_RX_IRQ_OFF_THLD, 1);
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regmap_read(regmap_i2s, I2S_TX_CFG_2, &slavemode);
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if (slavemode & I2S_TX_SLAVE_MODE_MASK)
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regmap_update_bits(regmap_i2s, I2S_RX_CFG_2,
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I2S_RX_SLAVE_MODE_MASK, 0);
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else
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regmap_update_bits(regmap_i2s, I2S_RX_CFG_2,
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I2S_RX_SLAVE_MODE_MASK,
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I2S_RX_SLAVE_MODE);
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}
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return 0;
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}
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static void bcm63xx_i2s_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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unsigned int enabled, slavemode;
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struct bcm_i2s_priv *i2s_priv = snd_soc_dai_get_drvdata(dai);
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struct regmap *regmap_i2s = i2s_priv->regmap_i2s;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_update_bits(regmap_i2s, I2S_TX_CFG,
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I2S_TX_OUT_R | I2S_TX_DATA_ALIGNMENT |
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I2S_TX_DATA_ENABLE | I2S_TX_CLOCK_ENABLE, 0);
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regmap_write(regmap_i2s, I2S_TX_IRQ_CTL, 1);
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regmap_write(regmap_i2s, I2S_TX_IRQ_IFF_THLD, 4);
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regmap_write(regmap_i2s, I2S_TX_IRQ_OFF_THLD, 4);
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regmap_read(regmap_i2s, I2S_TX_CFG_2, &slavemode);
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slavemode = slavemode & I2S_TX_SLAVE_MODE_MASK;
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if (!slavemode) {
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regmap_read(regmap_i2s, I2S_RX_CFG, &enabled);
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enabled = enabled & I2S_RX_ENABLE_MASK;
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if (enabled)
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regmap_update_bits(regmap_i2s, I2S_RX_CFG_2,
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I2S_RX_SLAVE_MODE_MASK,
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I2S_RX_MASTER_MODE);
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}
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regmap_update_bits(regmap_i2s, I2S_TX_CFG_2,
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I2S_TX_SLAVE_MODE_MASK,
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I2S_TX_SLAVE_MODE);
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} else {
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regmap_update_bits(regmap_i2s, I2S_RX_CFG,
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I2S_RX_IN_R | I2S_RX_DATA_ALIGNMENT |
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I2S_RX_CLOCK_ENABLE, 0);
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regmap_write(regmap_i2s, I2S_RX_IRQ_CTL, 1);
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regmap_write(regmap_i2s, I2S_RX_IRQ_IFF_THLD, 4);
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regmap_write(regmap_i2s, I2S_RX_IRQ_OFF_THLD, 4);
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regmap_read(regmap_i2s, I2S_RX_CFG_2, &slavemode);
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slavemode = slavemode & I2S_RX_SLAVE_MODE_MASK;
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if (!slavemode) {
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regmap_read(regmap_i2s, I2S_TX_CFG, &enabled);
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enabled = enabled & I2S_TX_ENABLE_MASK;
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if (enabled)
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regmap_update_bits(regmap_i2s, I2S_TX_CFG_2,
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I2S_TX_SLAVE_MODE_MASK,
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I2S_TX_MASTER_MODE);
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}
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regmap_update_bits(regmap_i2s, I2S_RX_CFG_2,
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I2S_RX_SLAVE_MODE_MASK, I2S_RX_SLAVE_MODE);
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}
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}
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static const struct snd_soc_dai_ops bcm63xx_i2s_dai_ops = {
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.startup = bcm63xx_i2s_startup,
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.shutdown = bcm63xx_i2s_shutdown,
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.hw_params = bcm63xx_i2s_hw_params,
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};
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static struct snd_soc_dai_driver bcm63xx_i2s_dai = {
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.name = DRV_NAME,
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.playback = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_192000,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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},
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.capture = {
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_192000,
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.formats = SNDRV_PCM_FMTBIT_S32_LE,
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},
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.ops = &bcm63xx_i2s_dai_ops,
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.symmetric_rate = 1,
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.symmetric_channels = 1,
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};
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static const struct snd_soc_component_driver bcm63xx_i2s_component = {
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.name = "bcm63xx",
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.legacy_dai_naming = 1,
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};
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static int bcm63xx_i2s_dev_probe(struct platform_device *pdev)
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{
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int ret = 0;
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void __iomem *regs;
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struct bcm_i2s_priv *i2s_priv;
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struct regmap *regmap_i2s;
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struct clk *i2s_clk;
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i2s_priv = devm_kzalloc(&pdev->dev, sizeof(*i2s_priv), GFP_KERNEL);
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if (!i2s_priv)
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return -ENOMEM;
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i2s_clk = devm_clk_get(&pdev->dev, "i2sclk");
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if (IS_ERR(i2s_clk)) {
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dev_err(&pdev->dev, "%s: cannot get a brcm clock: %ld\n",
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__func__, PTR_ERR(i2s_clk));
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return PTR_ERR(i2s_clk);
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}
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regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(regs)) {
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ret = PTR_ERR(regs);
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return ret;
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}
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regmap_i2s = devm_regmap_init_mmio(&pdev->dev,
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regs, &brcm_i2s_regmap_config);
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if (IS_ERR(regmap_i2s))
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return PTR_ERR(regmap_i2s);
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regmap_update_bits(regmap_i2s, I2S_MISC_CFG,
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I2S_PAD_LVL_LOOP_DIS_MASK,
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I2S_PAD_LVL_LOOP_DIS_ENABLE);
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ret = devm_snd_soc_register_component(&pdev->dev,
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&bcm63xx_i2s_component,
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&bcm63xx_i2s_dai, 1);
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if (ret) {
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dev_err(&pdev->dev, "failed to register the dai\n");
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return ret;
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}
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i2s_priv->dev = &pdev->dev;
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i2s_priv->i2s_clk = i2s_clk;
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i2s_priv->regmap_i2s = regmap_i2s;
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dev_set_drvdata(&pdev->dev, i2s_priv);
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ret = bcm63xx_soc_platform_probe(pdev, i2s_priv);
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if (ret)
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dev_err(&pdev->dev, "failed to register the pcm\n");
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return ret;
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}
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static void bcm63xx_i2s_dev_remove(struct platform_device *pdev)
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{
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bcm63xx_soc_platform_remove(pdev);
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}
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#ifdef CONFIG_OF
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static const struct of_device_id snd_soc_bcm_audio_match[] = {
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{.compatible = "brcm,bcm63xx-i2s"},
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{ }
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};
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#endif
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static struct platform_driver bcm63xx_i2s_driver = {
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.driver = {
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.name = DRV_NAME,
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.of_match_table = of_match_ptr(snd_soc_bcm_audio_match),
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},
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.probe = bcm63xx_i2s_dev_probe,
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.remove_new = bcm63xx_i2s_dev_remove,
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};
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module_platform_driver(bcm63xx_i2s_driver);
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MODULE_AUTHOR("Kevin,Li <kevin-ke.li@broadcom.com>");
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MODULE_DESCRIPTION("Broadcom DSL XPON ASOC I2S Interface");
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MODULE_LICENSE("GPL v2");
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